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Merge pull request #218 from adafruit/update-tinyusb-081e4eecba3c91f08cdf96b0a090e7726cec3727
update tinyusb to commit 081e4eecba3c91f08cdf96b0a090e7726cec3727
2 parents 5ff7bd7 + 60b41f4 commit 35016f8

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2 files changed

+60
-32
lines changed

2 files changed

+60
-32
lines changed

src/class/msc/msc_host.c

Lines changed: 45 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,7 @@ typedef struct
6464
uint8_t stage;
6565
void* buffer;
6666
tuh_msc_complete_cb_t complete_cb;
67+
uintptr_t complete_arg;
6768

6869
msc_cbw_t cbw;
6970
msc_csw_t csw;
@@ -126,7 +127,7 @@ static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun)
126127
cbw->lun = lun;
127128
}
128129

129-
bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb)
130+
bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
130131
{
131132
msch_interface_t* p_msc = get_itf(dev_addr);
132133
TU_VERIFY(p_msc->configured);
@@ -137,13 +138,14 @@ bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tu
137138
p_msc->stage = MSC_STAGE_CMD;
138139
p_msc->buffer = data;
139140
p_msc->complete_cb = complete_cb;
141+
p_msc->complete_arg = arg;
140142

141143
TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)));
142144

143145
return true;
144146
}
145147

146-
bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb)
148+
bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
147149
{
148150
msch_interface_t* p_msc = get_itf(dev_addr);
149151
TU_VERIFY(p_msc->configured);
@@ -156,10 +158,10 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r
156158
cbw.cmd_len = sizeof(scsi_read_capacity10_t);
157159
cbw.command[0] = SCSI_CMD_READ_CAPACITY_10;
158160

159-
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb);
161+
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
160162
}
161163

162-
bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb)
164+
bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
163165
{
164166
msch_interface_t* p_msc = get_itf(dev_addr);
165167
TU_VERIFY(p_msc->mounted);
@@ -178,10 +180,10 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons
178180
};
179181
memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len);
180182

181-
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb);
183+
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
182184
}
183185

184-
bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb)
186+
bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
185187
{
186188
msch_interface_t* p_msc = get_itf(dev_addr);
187189
TU_VERIFY(p_msc->configured);
@@ -195,10 +197,10 @@ bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_
195197
cbw.command[0] = SCSI_CMD_TEST_UNIT_READY;
196198
cbw.command[1] = lun; // according to wiki TODO need verification
197199

198-
return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb);
200+
return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb, arg);
199201
}
200202

201-
bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb)
203+
bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
202204
{
203205
msc_cbw_t cbw;
204206
cbw_init(&cbw, lun);
@@ -215,10 +217,10 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms
215217

216218
memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len);
217219

218-
return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb);
220+
return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb, arg);
219221
}
220222

221-
bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb)
223+
bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
222224
{
223225
msch_interface_t* p_msc = get_itf(dev_addr);
224226
TU_VERIFY(p_msc->mounted);
@@ -239,10 +241,10 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba,
239241

240242
memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
241243

242-
return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb);
244+
return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg);
243245
}
244246

245-
bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb)
247+
bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
246248
{
247249
msch_interface_t* p_msc = get_itf(dev_addr);
248250
TU_VERIFY(p_msc->mounted);
@@ -263,7 +265,7 @@ bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_
263265

264266
memcpy(cbw.command, &cmd_write10, cbw.cmd_len);
265267

266-
return tuh_msc_scsi_command(dev_addr, &cbw, (void*)(uintptr_t) buffer, complete_cb);
268+
return tuh_msc_scsi_command(dev_addr, &cbw, (void*)(uintptr_t) buffer, complete_cb, arg);
267269
}
268270

269271
#if 0
@@ -344,7 +346,17 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
344346
// SCSI op is complete
345347
p_msc->stage = MSC_STAGE_IDLE;
346348

347-
if (p_msc->complete_cb) p_msc->complete_cb(dev_addr, cbw, csw);
349+
if (p_msc->complete_cb)
350+
{
351+
tuh_msc_complete_data_t const cb_data =
352+
{
353+
.cbw = cbw,
354+
.csw = csw,
355+
.scsi_data = p_msc->buffer,
356+
.user_arg = p_msc->complete_arg
357+
};
358+
p_msc->complete_cb(dev_addr, &cb_data);
359+
}
348360
break;
349361

350362
// unknown state
@@ -359,9 +371,9 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
359371
//--------------------------------------------------------------------+
360372

361373
static void config_get_maxlun_complete (tuh_xfer_t* xfer);
362-
static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
363-
static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
364-
static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
374+
static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data);
375+
static bool config_request_sense_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data);
376+
static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data);
365377

366378
bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len)
367379
{
@@ -446,37 +458,46 @@ static void config_get_maxlun_complete (tuh_xfer_t* xfer)
446458
// TODO multiple LUN support
447459
TU_LOG2("SCSI Test Unit Ready\r\n");
448460
uint8_t const lun = 0;
449-
tuh_msc_test_unit_ready(daddr, lun, config_test_unit_ready_complete);
461+
tuh_msc_test_unit_ready(daddr, lun, config_test_unit_ready_complete, 0);
450462
}
451463

452-
static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
464+
static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
453465
{
466+
msc_cbw_t const* cbw = cb_data->cbw;
467+
msc_csw_t const* csw = cb_data->csw;
468+
454469
if (csw->status == 0)
455470
{
456471
// Unit is ready, read its capacity
457472
TU_LOG2("SCSI Read Capacity\r\n");
458-
tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer), config_read_capacity_complete);
473+
tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer), config_read_capacity_complete, 0);
459474
}else
460475
{
461476
// Note: During enumeration, some device fails Test Unit Ready and require a few retries
462477
// with Request Sense to start working !!
463478
// TODO limit number of retries
464479
TU_LOG2("SCSI Request Sense\r\n");
465-
TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, _msch_buffer, config_request_sense_complete));
480+
TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, _msch_buffer, config_request_sense_complete, 0));
466481
}
467482

468483
return true;
469484
}
470485

471-
static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
486+
static bool config_request_sense_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
472487
{
488+
msc_cbw_t const* cbw = cb_data->cbw;
489+
msc_csw_t const* csw = cb_data->csw;
490+
473491
TU_ASSERT(csw->status == 0);
474-
TU_ASSERT(tuh_msc_test_unit_ready(dev_addr, cbw->lun, config_test_unit_ready_complete));
492+
TU_ASSERT(tuh_msc_test_unit_ready(dev_addr, cbw->lun, config_test_unit_ready_complete, 0));
475493
return true;
476494
}
477495

478-
static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw)
496+
static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
479497
{
498+
msc_cbw_t const* cbw = cb_data->cbw;
499+
msc_csw_t const* csw = cb_data->csw;
500+
480501
TU_ASSERT(csw->status == 0);
481502

482503
msch_interface_t* p_msc = get_itf(dev_addr);

src/class/msc/msc_host.h

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,14 @@
4141
#define CFG_TUH_MSC_MAXLUN 4
4242
#endif
4343

44-
typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw);
44+
typedef struct {
45+
msc_cbw_t const* cbw; // SCSI command
46+
msc_csw_t const* csw; // SCSI status
47+
void* scsi_data; // SCSI Data
48+
uintptr_t user_arg; // user argument
49+
}tuh_msc_complete_data_t;
50+
51+
typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data);
4552

4653
//--------------------------------------------------------------------+
4754
// Application API
@@ -66,33 +73,33 @@ uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun);
6673
// Perform a full SCSI command (cbw, data, csw) in non-blocking manner.
6774
// Complete callback is invoked when SCSI op is complete.
6875
// return true if success, false if there is already pending operation.
69-
bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb);
76+
bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
7077

7178
// Perform SCSI Inquiry command
7279
// Complete callback is invoked when SCSI op is complete.
73-
bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb);
80+
bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
7481

7582
// Perform SCSI Test Unit Ready command
7683
// Complete callback is invoked when SCSI op is complete.
77-
bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb);
84+
bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
7885

7986
// Perform SCSI Request Sense 10 command
8087
// Complete callback is invoked when SCSI op is complete.
81-
bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb);
88+
bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
8289

8390
// Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer
8491
// Complete callback is invoked when SCSI op is complete.
85-
bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb);
92+
bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
8693

8794
// Perform SCSI Write 10 command. Write n blocks starting from LBA to device
8895
// Complete callback is invoked when SCSI op is complete.
89-
bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb);
96+
bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
9097

9198
// Perform SCSI Read Capacity 10 command
9299
// Complete callback is invoked when SCSI op is complete.
93100
// Note: during enumeration, host stack already carried out this request. Application can retrieve capacity by
94101
// simply call tuh_msc_get_block_count() and tuh_msc_get_block_size()
95-
bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb);
102+
bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
96103

97104
//------------- Application Callback -------------//
98105

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