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edanuffedanuff
authored
Merge pull request #4 from edanuff/main
update Status Reg for Page 2 bit
2 parents 9464193 + 60efc48 commit 2251e8f

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+5019
-5652
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8 files changed

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-5652
lines changed

‎boards/a2n20v2-SDRAM/hdl/memory/apple_memory.sv

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,8 +70,11 @@ module apple_memory #(
7070
always @(posedge a2bus_if.clk_logic or negedge a2bus_if.system_reset_n) begin
7171
if (!a2bus_if.system_reset_n) begin
7272
SWITCHES_II <= '{1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1};
73-
end else if ((a2bus_if.phi1_posedge) && (a2bus_if.addr[15:4] == 12'hC05) && !a2bus_if.m2sel_n)
73+
end else if ((a2bus_if.phi1_posedge) && (a2bus_if.addr[15:4] == 12'hC05) && !a2bus_if.m2sel_n) begin
7474
SWITCHES_II[a2bus_if.addr[3:1]] <= a2bus_if.addr[0];
75+
end else if (!a2bus_if.rw_n && (a2bus_if.phi1_posedge) && (a2bus_if.addr == 16'hC068) && !a2bus_if.m2sel_n) begin
76+
SWITCHES_II[2] <= a2bus_if.data[6];
77+
end
7578
end
7679

7780
always @(posedge a2bus_if.clk_logic or negedge a2bus_if.system_reset_n) begin

‎boards/a2n20v2/impl/pnr/a2n20v2.fs

Lines changed: 1241 additions & 1241 deletions
Large diffs are not rendered by default.

‎boards/a2n20v2/impl/pnr/a2n20v2.pin.html

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ <h1><a name="Message">Pin Messages</a></h1>
7878
</tr>
7979
<tr>
8080
<td class="label">Created Time</td>
81-
<td>Sat Apr 13 20:25:18 2024
81+
<td>Sun Apr 14 08:00:32 2024
8282
</td>
8383
</tr>
8484
<tr>

‎boards/a2n20v2/impl/pnr/a2n20v2.power.html

Lines changed: 54 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,7 @@ <h1><a name="Message">Power Messages</a></h1>
8787
</tr>
8888
<tr>
8989
<td class="label">Created Time</td>
90-
<td>Sat Apr 13 20:25:18 2024
90+
<td>Sun Apr 14 08:00:32 2024
9191
</td>
9292
</tr>
9393
<tr>
@@ -100,15 +100,15 @@ <h2><a name="Power_Info">Power Information:</a></h2>
100100
<table class="summary_table">
101101
<tr>
102102
<td class="label">Total Power (mW)</td>
103-
<td>379.401</td>
103+
<td>379.395</td>
104104
</tr>
105105
<tr>
106106
<td class="label">Quiescent Power (mW)</td>
107107
<td>93.224</td>
108108
</tr>
109109
<tr>
110110
<td class="label">Dynamic Power (mW)</td>
111-
<td>286.176</td>
111+
<td>286.171</td>
112112
</tr>
113113
</table>
114114
<h2><a name="Thermal_Info">Thermal Information:</a></h2>
@@ -192,9 +192,9 @@ <h2><a name="Supply_Summary">Supply Information:</a></h2>
192192
<tr>
193193
<td>VCC</td>
194194
<td>1.000</td>
195-
<td>275.309</td>
195+
<td>275.303</td>
196196
<td>61.515</td>
197-
<td>336.824</td>
197+
<td>336.819</td>
198198
</tr>
199199
<tr>
200200
<td>VCCX</td>
@@ -222,9 +222,9 @@ <h2><a name="By_Block_Type">Power By Block Type:</a></h2>
222222
</tr>
223223
<tr>
224224
<td>Logic</td>
225-
<td>4.993</td>
225+
<td>4.987</td>
226226
<td>NA</td>
227-
<td>5.558</td>
227+
<td>5.562</td>
228228
</tr>
229229
<tr>
230230
<td>IO</td>
@@ -248,7 +248,7 @@ <h2><a name="By_Block_Type">Power By Block Type:</a></h2>
248248
<td>DSP</td>
249249
<td>1.033
250250
<td>NA</td>
251-
<td>4.070
251+
<td>4.065
252252
</tr>
253253
</table>
254254
<h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
@@ -260,20 +260,20 @@ <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
260260
</tr>
261261
<tr>
262262
<td>top</td>
263-
<td>273.353</td>
264-
<td>273.353(273.022)</td>
263+
<td>273.347</td>
264+
<td>273.347(273.021)</td>
265265
<tr>
266266
<td>top/apple_bus/</td>
267-
<td>0.108</td>
268-
<td>0.108(0.000)</td>
267+
<td>0.105</td>
268+
<td>0.105(0.000)</td>
269269
<tr>
270270
<td>top/apple_memory/</td>
271-
<td>209.415</td>
272-
<td>209.415(209.325)</td>
271+
<td>209.413</td>
272+
<td>209.413(209.325)</td>
273273
<tr>
274274
<td>top/apple_memory/hires_aux_2000_5FFF/</td>
275-
<td>59.500</td>
276-
<td>59.500(0.000)</td>
275+
<td>59.501</td>
276+
<td>59.501(0.000)</td>
277277
<tr>
278278
<td>top/apple_memory/hires_aux_6000_9FFF/</td>
279279
<td>59.499</td>
@@ -304,88 +304,88 @@ <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
304304
<td>5.649(0.000)</td>
305305
<tr>
306306
<td>top/hdmi/</td>
307-
<td>0.504</td>
308-
<td>0.504(0.465)</td>
307+
<td>0.496</td>
308+
<td>0.496(0.458)</td>
309309
<tr>
310310
<td>top/hdmi/tmds_gen[0].tmds_channel/</td>
311-
<td>0.055</td>
312-
<td>0.055(0.000)</td>
313-
<tr>
314-
<td>top/hdmi/tmds_gen[1].tmds_channel/</td>
315311
<td>0.053</td>
316312
<td>0.053(0.000)</td>
317313
<tr>
314+
<td>top/hdmi/tmds_gen[1].tmds_channel/</td>
315+
<td>0.050</td>
316+
<td>0.050(0.000)</td>
317+
<tr>
318318
<td>top/hdmi/tmds_gen[2].tmds_channel/</td>
319319
<td>0.051</td>
320320
<td>0.051(0.000)</td>
321321
<tr>
322322
<td>top/hdmi/true_hdmi_output.packet_assembler/</td>
323-
<td>0.110</td>
324-
<td>0.110(0.000)</td>
323+
<td>0.108</td>
324+
<td>0.108(0.000)</td>
325325
<tr>
326326
<td>top/hdmi/true_hdmi_output.packet_picker/</td>
327-
<td>0.197</td>
328-
<td>0.197(0.048)</td>
327+
<td>0.196</td>
328+
<td>0.196(0.048)</td>
329329
<tr>
330330
<td>top/hdmi/true_hdmi_output.packet_picker/audio_clock_regeneration_packet/</td>
331331
<td>0.048</td>
332332
<td>0.048(0.000)</td>
333333
<tr>
334334
<td>top/mockingboard/</td>
335-
<td>1.062</td>
336-
<td>1.062(1.062)</td>
335+
<td>1.061</td>
336+
<td>1.061(1.061)</td>
337337
<tr>
338338
<td>top/mockingboard/m6522_left/</td>
339339
<td>0.192</td>
340340
<td>0.192(0.000)</td>
341341
<tr>
342342
<td>top/mockingboard/m6522_right/</td>
343-
<td>0.191</td>
344-
<td>0.191(0.000)</td>
343+
<td>0.192</td>
344+
<td>0.192(0.000)</td>
345345
<tr>
346346
<td>top/mockingboard/psg_left/</td>
347-
<td>0.337</td>
348-
<td>0.337(0.000)</td>
347+
<td>0.338</td>
348+
<td>0.338(0.000)</td>
349349
<tr>
350350
<td>top/mockingboard/psg_right/</td>
351-
<td>0.342</td>
352-
<td>0.342(0.000)</td>
351+
<td>0.339</td>
352+
<td>0.339(0.000)</td>
353353
<tr>
354354
<td>top/supersprite/</td>
355-
<td>41.538</td>
356-
<td>41.538(41.459)</td>
355+
<td>41.553</td>
356+
<td>41.553(41.474)</td>
357357
<tr>
358358
<td>top/supersprite/ssp_psg/</td>
359-
<td>0.337</td>
360-
<td>0.337(0.000)</td>
359+
<td>0.344</td>
360+
<td>0.344(0.000)</td>
361361
<tr>
362362
<td>top/supersprite/vdp/</td>
363-
<td>41.122</td>
364-
<td>41.122(41.122)</td>
363+
<td>41.129</td>
364+
<td>41.129(41.129)</td>
365365
<tr>
366366
<td>top/supersprite/vdp/f18a_core/</td>
367-
<td>41.122</td>
368-
<td>41.122(41.119)</td>
367+
<td>41.129</td>
368+
<td>41.129(41.127)</td>
369369
<tr>
370370
<td>top/supersprite/vdp/f18a_core/inst_color/</td>
371371
<td>0.036</td>
372372
<td>0.036(0.000)</td>
373373
<tr>
374374
<td>top/supersprite/vdp/f18a_core/inst_counters/</td>
375-
<td>0.062</td>
376-
<td>0.062(0.000)</td>
375+
<td>0.061</td>
376+
<td>0.061(0.000)</td>
377377
<tr>
378378
<td>top/supersprite/vdp/f18a_core/inst_cpu/</td>
379-
<td>0.600</td>
380-
<td>0.600(0.000)</td>
379+
<td>0.602</td>
380+
<td>0.602(0.000)</td>
381381
<tr>
382382
<td>top/supersprite/vdp/f18a_core/inst_sprites/</td>
383-
<td>8.543</td>
384-
<td>8.543(0.000)</td>
383+
<td>8.544</td>
384+
<td>8.544(0.000)</td>
385385
<tr>
386386
<td>top/supersprite/vdp/f18a_core/inst_tiles/</td>
387-
<td>2.170</td>
388-
<td>2.170(0.314)</td>
387+
<td>2.175</td>
388+
<td>2.175(0.314)</td>
389389
<tr>
390390
<td>top/supersprite/vdp/f18a_core/inst_tiles/inst_linebuf/</td>
391391
<td>0.314</td>
@@ -396,8 +396,8 @@ <h2><a name="By_Hierarchy">Power By Hierarchy:</a></h2>
396396
<td>0.002(0.000)</td>
397397
<tr>
398398
<td>top/supersprite/vdp/f18a_core/inst_vram/</td>
399-
<td>29.707</td>
400-
<td>29.707(29.643)</td>
399+
<td>29.706</td>
400+
<td>29.706(29.643)</td>
401401
<tr>
402402
<td>top/supersprite/vdp/f18a_core/inst_vram/inst_ram/</td>
403403
<td>29.643</td>
@@ -417,12 +417,12 @@ <h2><a name="By_Clock_Domain">Power By Clock Domain:</a></h2>
417417
<tr>
418418
<td>clk_pixel</td>
419419
<td>27.000</td>
420-
<td>15.559</td>
420+
<td>15.555</td>
421421
</tr>
422422
<tr>
423423
<td>clk_logic</td>
424424
<td>54.000</td>
425-
<td>252.167</td>
425+
<td>252.166</td>
426426
</tr>
427427
<tr>
428428
<td>NO CLOCK DOMAIN</td>

‎boards/a2n20v2/impl/pnr/a2n20v2.rpt.html

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@ <h1><a name="Message">PnR Messages</a></h1>
8383
</tr>
8484
<tr>
8585
<td class="label">Created Time</td>
86-
<td>Sat Apr 13 20:25:18 2024
86+
<td>Sun Apr 14 08:00:32 2024
8787
</td>
8888
</tr>
8989
<tr>
@@ -97,24 +97,24 @@ <h1><a name="PnR_Details">PnR Details</a></h1>
9797
<tr>
9898
<td class="label">Place & Route Process</td>
9999
<td>Running placement:
100-
Placement Phase 0: CPU time = 0h 0m 0.614s, Elapsed time = 0h 0m 0.614s
101-
Placement Phase 1: CPU time = 0h 0m 0.186s, Elapsed time = 0h 0m 0.185s
100+
Placement Phase 0: CPU time = 0h 0m 0.638s, Elapsed time = 0h 0m 0.638s
101+
Placement Phase 1: CPU time = 0h 0m 0.188s, Elapsed time = 0h 0m 0.189s
102102
Placement Phase 2: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
103103
Placement Phase 3: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s
104104
Total Placement: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s
105105
Running routing:
106-
Routing Phase 0: CPU time = 0h 0m 0.001s, Elapsed time = 0h 0m 0.002s
107-
Routing Phase 1: CPU time = 0h 0m 0.239s, Elapsed time = 0h 0m 0.238s
108-
Routing Phase 2: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s
106+
Routing Phase 0: CPU time = 0h 0m 0.002s, Elapsed time = 0h 0m 0.002s
107+
Routing Phase 1: CPU time = 0h 0m 0.306s, Elapsed time = 0h 0m 0.306s
108+
Routing Phase 2: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
109109
Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s
110110
Total Routing: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s
111111
Generate output files:
112-
CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
112+
CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
113113
</td>
114114
</tr>
115115
<tr>
116116
<td class="label">Total Time and Memory Usage</td>
117-
<td>CPU time = 0h 0m 10s, Elapsed time = 0h 0m 10s, Peak memory usage = 322MB</td>
117+
<td>CPU time = 0h 0m 11s, Elapsed time = 0h 0m 11s, Peak memory usage = 314MB</td>
118118
</tr>
119119
</table>
120120
<br/>
@@ -129,12 +129,12 @@ <h2><a name="Resource_Usage_Summary">Resource Usage Summary:</a></h2>
129129
</tr>
130130
<tr>
131131
<td class="label">Logic</td>
132-
<td>6889/20736</td>
132+
<td>6869/20736</td>
133133
<td>34%</td>
134134
</tr>
135135
<tr>
136136
<td class="label">&nbsp &nbsp --LUT,ALU,ROM16</td>
137-
<td>6019(5427 LUT, 592 ALU, 0 ROM16)</td>
137+
<td>5999(5407 LUT, 592 ALU, 0 ROM16)</td>
138138
<td>-</td>
139139
</tr>
140140
<tr>
@@ -169,8 +169,8 @@ <h2><a name="Resource_Usage_Summary">Resource Usage Summary:</a></h2>
169169
</tr>
170170
<tr>
171171
<td class="label">CLS</td>
172-
<td>4789/10368</td>
173-
<td>47%</td>
172+
<td>4765/10368</td>
173+
<td>46%</td>
174174
</tr>
175175
<tr>
176176
<td class="label">I/O Port</td>

‎boards/a2n20v2/impl/pnr/a2n20v2.rpt.txt

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -12,43 +12,43 @@
1212
<Part Number>: GW2AR-LV18QN88C8/I7
1313
<Device>: GW2AR-18
1414
<Device Version>: C
15-
<Created Time>:Sat Apr 13 20:25:18 2024
15+
<Created Time>:Sun Apr 14 08:00:32 2024
1616

1717

1818
2. PnR Details
1919

2020
Running placement:
21-
Placement Phase 0: CPU time = 0h 0m 0.614s, Elapsed time = 0h 0m 0.614s
22-
Placement Phase 1: CPU time = 0h 0m 0.186s, Elapsed time = 0h 0m 0.185s
21+
Placement Phase 0: CPU time = 0h 0m 0.638s, Elapsed time = 0h 0m 0.638s
22+
Placement Phase 1: CPU time = 0h 0m 0.188s, Elapsed time = 0h 0m 0.189s
2323
Placement Phase 2: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
2424
Placement Phase 3: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s
2525
Total Placement: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s
2626
Running routing:
27-
Routing Phase 0: CPU time = 0h 0m 0.001s, Elapsed time = 0h 0m 0.002s
28-
Routing Phase 1: CPU time = 0h 0m 0.239s, Elapsed time = 0h 0m 0.238s
29-
Routing Phase 2: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s
27+
Routing Phase 0: CPU time = 0h 0m 0.002s, Elapsed time = 0h 0m 0.002s
28+
Routing Phase 1: CPU time = 0h 0m 0.306s, Elapsed time = 0h 0m 0.306s
29+
Routing Phase 2: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
3030
Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s
3131
Total Routing: CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s
3232
Generate output files:
33-
CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s
33+
CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
3434

35-
Total Time and Memory Usage: CPU time = 0h 0m 10s, Elapsed time = 0h 0m 10s, Peak memory usage = 322MB
35+
Total Time and Memory Usage: CPU time = 0h 0m 11s, Elapsed time = 0h 0m 11s, Peak memory usage = 314MB
3636

3737

3838
3. Resource Usage Summary
3939

4040
----------------------------------------------------------
4141
Resources | Usage
4242
----------------------------------------------------------
43-
Logic | 6889/20736 34%
44-
--LUT,ALU,ROM16 | 6019(5427 LUT, 592 ALU, 0 ROM16)
43+
Logic | 6869/20736 34%
44+
--LUT,ALU,ROM16 | 5999(5407 LUT, 592 ALU, 0 ROM16)
4545
--SSRAM(RAM16) | 145
4646
Register | 3136/15750 20%
4747
--Logic Register as Latch | 0/15552 0%
4848
--Logic Register as FF | 3117/15552 21%
4949
--I/O Register as Latch | 0/198 0%
5050
--I/O Register as FF | 19/198 10%
51-
CLS | 4789/10368 47%
51+
CLS | 4765/10368 46%
5252
I/O Port | 36
5353
I/O Buf | 30
5454
--Input Buf | 5

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