Yosys pass opt_expr performing unexpected simplification of ternary condition.

[vcanumalla]

I have the following verilog file, a modified version of a DSP simulation model link here.

In particular, I've made a number of modifications to this file to make it compatible with a series of Yosys passes that the tool I'm using performs, the one that might immediately relevant to my problem is that I've converted string values to variants in an enum.

On line 1171 I have the following block, which details the multiply functionality of the DSP.

    assign mult_o = ((USE_MULT == NONE_ENUM_VAL) || (USE_SIMD != ONE48_ENUM_VAL)) ? 43'b0 :
                    (carryinsel_in == 3'b010) ? 43'b0 :
                    {{18{ad_mult[24]}}, ad_mult[24:0]} * {{25{b_mult[17]}}, b_mult};

The parameters of this DSP say that use_mult and use_simd must be certain values to use the multiplier, and this ternary as such follows these semantics: the multiplier is only when its a one lane adder, and use_mult is activated.
However, when running a series of Yosys passes, this assign is being simplified to assign mult_o = 48'0.

I've narrowed down the specific pass that does this simplification to opt_expr, and the issue can be replicated using the following command
yosys -p "read_verilog -sv DSP48E1.v; hierarchy -simcheck -top DSP48E1; debug opt_expr; write_verilog output/tmpoutputv.sv" > output.log.

Here are some relevant lines from output.log:

Replacing $eq cell `$eq$lakeroad-private/DSP48E1/DSP48E1.v:1171$102' (isneq) in module `\DSP48E1' with constant driver 
 `$eq$lakeroad-private/DSP48E1/DSP48E1.v:1171$102_Y = 1'0'.
Replacing $ne cell `$ne$lakeroad-private/DSP48E1/DSP48E1.v:1171$103' (isneq) in module `\DSP48E1' with constant driver `$ne$lakeroad-private/DSP48E1/DSP48E1.v:1171$103_Y = 1'1'.
Replacing $logic_or cell `$logic_or$lakeroad-private/DSP48E1/DSP48E1.v:1171$104' (const_or) in module `\DSP48E1' with constant driver `$logic_or$lakeroad-private/DSP48E1/DSP48E1.v:1171$104_Y = 1'1'.
Replacing $mux cell `$ternary$lakeroad-private/DSP48E1/DSP48E1.v:1171$106' (1) in module `\DSP48E1' with constant driver `$ternary$lakeroad-private/DSP48E1/DSP48E1.v:1171$106_Y = 43'0000000000000000000000000000000000000000000'.

I'd appreciate some help in understanding why opt_expr is performing this simplification: I'm not able to convince myself that its always true.

Please let me know if any other info would be useful, and thanks in advance!

[nakengelhardt]

That optimization is quite correct, USE_MULT and USE_SIMD are declared as single bit inputs:

  input USE_MULT;
  input USE_PATTERN_DETECT;
  input USE_SIMD;

So they can only have the values 0 or 1. This would correspond to these enum values:

  NO_RESET_ENUM_VAL = 0,
  DIRECT_ENUM_VAL = 1,

But the ones being compared against are NONE_ENUM_VAL = 11 and ONE48_ENUM_VAL = 7, values that are not representable by the input signals being compared to, so the comparisons must be always false and can be optimized away.

[gussmith23]

🤦 great catch Nina!!! Thank you! We forgot to make those inputs the same width as the enum.

[vcanumalla]

Many many thanks! Appreciate the help finding such a silly error XD.