@@ -431,8 +431,8 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat
431
431
Instruction (r'\V128.\STORE\K{16\_lane}~\memarg~\laneidx' , r'\hex{FD}~~\hex{59}' , r'[\I32~\V128] \to []' , r'valid-store-lane' , r'exec-store-lane' ),
432
432
Instruction (r'\V128.\STORE\K{32\_lane}~\memarg~\laneidx' , r'\hex{FD}~~\hex{5A}' , r'[\I32~\V128] \to []' , r'valid-store-lane' , r'exec-store-lane' ),
433
433
Instruction (r'\V128.\STORE\K{64\_lane}~\memarg~\laneidx' , r'\hex{FD}~~\hex{5B}' , r'[\I32~\V128] \to []' , r'valid-store-lane' , r'exec-store-lane' ),
434
- Instruction (r'\V128.\LOAD\K{32\_zero}~\memarg~\laneidx ' , r'\hex{FD}~~\hex{5C}' , r'[\I32] \to [\V128]' , r'valid-load-zero' , r'exec-load-zero' ),
435
- Instruction (r'\V128.\LOAD\K{64\_zero}~\memarg~\laneidx ' , r'\hex{FD}~~\hex{5D}' , r'[\I32] \to [\V128]' , r'valid-load-zero' , r'exec-load-zero' ),
434
+ Instruction (r'\V128.\LOAD\K{32\_zero}~\memarg' , r'\hex{FD}~~\hex{5C}' , r'[\I32] \to [\V128]' , r'valid-load-zero' , r'exec-load-zero' ),
435
+ Instruction (r'\V128.\LOAD\K{64\_zero}~\memarg' , r'\hex{FD}~~\hex{5D}' , r'[\I32] \to [\V128]' , r'valid-load-zero' , r'exec-load-zero' ),
436
436
Instruction (r'\F32X4.\VDEMOTE\K{\_f64x2\_zero}' , r'\hex{FD}~~\hex{5E}' , r'[\V128] \to [\V128]' , r'valid-vcvtop' , r'exec-vcvtop' , r'op-demote' ),
437
437
Instruction (r'\F64X2.\VPROMOTE\K{\_low\_f32x4}' , r'\hex{FD}~~\hex{5F}' , r'[\V128] \to [\V128]' , r'valid-vcvtop' , r'exec-vcvtop' , r'op-promote' ),
438
438
Instruction (r'\I8X16.\VABS' , r'\hex{FD}~~\hex{60}' , r'[\V128] \to [\V128]' , r'valid-vunop' , r'exec-vunop' , r'op-iabs' ),
0 commit comments