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kripkenkripken
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Add missing SIMD fuzzing (#7445)
This fixes almost all the current TODOs.
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-78
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2 files changed

+149
-78
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‎src/tools/fuzzing/fuzzing.cpp

Lines changed: 123 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -3831,12 +3831,17 @@ Expression* TranslateToFuzzReader::makeUnary(Type type) {
38313831
}
38323832
case Type::v128: {
38333833
assert(wasm.features.hasSIMD());
3834-
// TODO: Add the other SIMD unary ops
3835-
return buildUnary({pick(AnyTrueVec128,
3836-
AllTrueVecI8x16,
3837-
AllTrueVecI16x8,
3838-
AllTrueVecI32x4),
3839-
make(Type::v128)});
3834+
auto op = pick(FeatureOptions<UnaryOp>().add(FeatureSet::SIMD,
3835+
AnyTrueVec128,
3836+
AllTrueVecI8x16,
3837+
AllTrueVecI16x8,
3838+
AllTrueVecI32x4,
3839+
AllTrueVecI64x2,
3840+
BitmaskVecI8x16,
3841+
BitmaskVecI16x8,
3842+
BitmaskVecI32x4,
3843+
BitmaskVecI64x2));
3844+
return buildUnary({op, make(Type::v128)});
38403845
}
38413846
case Type::none:
38423847
case Type::unreachable:
@@ -3945,46 +3950,76 @@ Expression* TranslateToFuzzReader::makeUnary(Type type) {
39453950
case 3:
39463951
return buildUnary({SplatVecF64x2, make(Type::f64)});
39473952
case 4:
3948-
return buildUnary(
3949-
{pick(FeatureOptions<UnaryOp>()
3950-
.add(FeatureSet::SIMD,
3951-
NotVec128,
3952-
// TODO: add additional SIMD instructions
3953-
NegVecI8x16,
3954-
NegVecI16x8,
3955-
NegVecI32x4,
3956-
NegVecI64x2,
3957-
AbsVecF32x4,
3958-
NegVecF32x4,
3959-
SqrtVecF32x4,
3960-
AbsVecF64x2,
3961-
NegVecF64x2,
3962-
SqrtVecF64x2,
3963-
TruncSatSVecF32x4ToVecI32x4,
3964-
TruncSatUVecF32x4ToVecI32x4,
3965-
ConvertSVecI32x4ToVecF32x4,
3966-
ConvertUVecI32x4ToVecF32x4,
3967-
ExtendLowSVecI8x16ToVecI16x8,
3968-
ExtendHighSVecI8x16ToVecI16x8,
3969-
ExtendLowUVecI8x16ToVecI16x8,
3970-
ExtendHighUVecI8x16ToVecI16x8,
3971-
ExtendLowSVecI16x8ToVecI32x4,
3972-
ExtendHighSVecI16x8ToVecI32x4,
3973-
ExtendLowUVecI16x8ToVecI32x4,
3974-
ExtendHighUVecI16x8ToVecI32x4)
3975-
.add(FeatureSet::FP16,
3976-
AbsVecF16x8,
3977-
NegVecF16x8,
3978-
SqrtVecF16x8,
3979-
CeilVecF16x8,
3980-
FloorVecF16x8,
3981-
TruncVecF16x8,
3982-
NearestVecF16x8,
3983-
TruncSatSVecF16x8ToVecI16x8,
3984-
TruncSatUVecF16x8ToVecI16x8,
3985-
ConvertSVecI16x8ToVecF16x8,
3986-
ConvertUVecI16x8ToVecF16x8)),
3987-
make(Type::v128)});
3953+
return buildUnary({pick(FeatureOptions<UnaryOp>()
3954+
.add(FeatureSet::SIMD,
3955+
NotVec128,
3956+
AbsVecI8x16,
3957+
AbsVecI16x8,
3958+
AbsVecI32x4,
3959+
AbsVecI64x2,
3960+
PopcntVecI8x16,
3961+
NegVecI8x16,
3962+
NegVecI16x8,
3963+
NegVecI32x4,
3964+
NegVecI64x2,
3965+
AbsVecF32x4,
3966+
NegVecF32x4,
3967+
SqrtVecF32x4,
3968+
CeilVecF32x4,
3969+
FloorVecF32x4,
3970+
TruncVecF32x4,
3971+
NearestVecF32x4,
3972+
AbsVecF64x2,
3973+
NegVecF64x2,
3974+
SqrtVecF64x2,
3975+
CeilVecF64x2,
3976+
FloorVecF64x2,
3977+
TruncVecF64x2,
3978+
NearestVecF64x2,
3979+
ExtAddPairwiseSVecI8x16ToI16x8,
3980+
ExtAddPairwiseUVecI8x16ToI16x8,
3981+
ExtAddPairwiseSVecI16x8ToI32x4,
3982+
ExtAddPairwiseUVecI16x8ToI32x4,
3983+
TruncSatSVecF32x4ToVecI32x4,
3984+
TruncSatUVecF32x4ToVecI32x4,
3985+
ConvertSVecI32x4ToVecF32x4,
3986+
ConvertUVecI32x4ToVecF32x4,
3987+
ExtendLowSVecI8x16ToVecI16x8,
3988+
ExtendHighSVecI8x16ToVecI16x8,
3989+
ExtendLowUVecI8x16ToVecI16x8,
3990+
ExtendHighUVecI8x16ToVecI16x8,
3991+
ExtendLowSVecI16x8ToVecI32x4,
3992+
ExtendHighSVecI16x8ToVecI32x4,
3993+
ExtendLowUVecI16x8ToVecI32x4,
3994+
ExtendHighUVecI16x8ToVecI32x4,
3995+
ExtendLowSVecI32x4ToVecI64x2,
3996+
ExtendHighSVecI32x4ToVecI64x2,
3997+
ExtendLowUVecI32x4ToVecI64x2,
3998+
ExtendHighUVecI32x4ToVecI64x2,
3999+
ConvertLowSVecI32x4ToVecF64x2,
4000+
ConvertLowUVecI32x4ToVecF64x2,
4001+
TruncSatZeroSVecF64x2ToVecI32x4,
4002+
TruncSatZeroUVecF64x2ToVecI32x4,
4003+
DemoteZeroVecF64x2ToVecF32x4,
4004+
PromoteLowVecF32x4ToVecF64x2)
4005+
.add(FeatureSet::RelaxedSIMD,
4006+
RelaxedTruncSVecF32x4ToVecI32x4,
4007+
RelaxedTruncUVecF32x4ToVecI32x4,
4008+
RelaxedTruncZeroSVecF64x2ToVecI32x4,
4009+
RelaxedTruncZeroUVecF64x2ToVecI32x4)
4010+
.add(FeatureSet::FP16,
4011+
AbsVecF16x8,
4012+
NegVecF16x8,
4013+
SqrtVecF16x8,
4014+
CeilVecF16x8,
4015+
FloorVecF16x8,
4016+
TruncVecF16x8,
4017+
NearestVecF16x8,
4018+
TruncSatSVecF16x8ToVecI16x8,
4019+
TruncSatUVecF16x8ToVecI16x8,
4020+
ConvertSVecI16x8ToVecF16x8,
4021+
ConvertUVecI16x8ToVecF16x8)),
4022+
make(Type::v128)});
39884023
}
39894024
WASM_UNREACHABLE("invalid value");
39904025
}
@@ -4146,6 +4181,12 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
41464181
LeUVecI32x4,
41474182
GeSVecI32x4,
41484183
GeUVecI32x4,
4184+
EqVecI64x2,
4185+
NeVecI64x2,
4186+
LtSVecI64x2,
4187+
GtSVecI64x2,
4188+
LeSVecI64x2,
4189+
GeSVecI64x2,
41494190
EqVecF32x4,
41504191
NeVecF32x4,
41514192
LtVecF32x4,
@@ -4158,6 +4199,8 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
41584199
GtVecF64x2,
41594200
LeVecF64x2,
41604201
GeVecF64x2,
4202+
4203+
// SIMD arithmetic
41614204
AndVec128,
41624205
OrVec128,
41634206
XorVec128,
@@ -4172,9 +4215,7 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
41724215
MinUVecI8x16,
41734216
MaxSVecI8x16,
41744217
MaxUVecI8x16,
4175-
// TODO: avgr_u
4176-
// TODO: q15mulr_sat_s
4177-
// TODO: extmul
4218+
AvgrUVecI8x16,
41784219
AddVecI16x8,
41794220
AddSatSVecI16x8,
41804221
AddSatUVecI16x8,
@@ -4186,6 +4227,12 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
41864227
MinUVecI16x8,
41874228
MaxSVecI16x8,
41884229
MaxUVecI16x8,
4230+
AvgrUVecI16x8,
4231+
Q15MulrSatSVecI16x8,
4232+
ExtMulLowSVecI16x8,
4233+
ExtMulHighSVecI16x8,
4234+
ExtMulLowUVecI16x8,
4235+
ExtMulHighUVecI16x8,
41894236
AddVecI32x4,
41904237
SubVecI32x4,
41914238
MulVecI32x4,
@@ -4194,24 +4241,41 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
41944241
MaxSVecI32x4,
41954242
MaxUVecI32x4,
41964243
DotSVecI16x8ToVecI32x4,
4244+
ExtMulLowSVecI32x4,
4245+
ExtMulHighSVecI32x4,
4246+
ExtMulLowUVecI32x4,
4247+
ExtMulHighUVecI32x4,
41974248
AddVecI64x2,
41984249
SubVecI64x2,
4250+
MulVecI64x2,
4251+
ExtMulLowSVecI64x2,
4252+
ExtMulHighSVecI64x2,
4253+
ExtMulLowUVecI64x2,
4254+
ExtMulHighUVecI64x2,
41994255
AddVecF32x4,
42004256
SubVecF32x4,
42014257
MulVecF32x4,
42024258
DivVecF32x4,
42034259
MinVecF32x4,
42044260
MaxVecF32x4,
4261+
PMinVecF32x4,
4262+
PMaxVecF32x4,
42054263
AddVecF64x2,
42064264
SubVecF64x2,
42074265
MulVecF64x2,
42084266
DivVecF64x2,
42094267
MinVecF64x2,
42104268
MaxVecF64x2,
4269+
PMinVecF64x2,
4270+
PMaxVecF64x2,
4271+
4272+
// SIMD Conversion
42114273
NarrowSVecI16x8ToVecI8x16,
42124274
NarrowUVecI16x8ToVecI8x16,
42134275
NarrowSVecI32x4ToVecI16x8,
42144276
NarrowUVecI32x4ToVecI16x8,
4277+
4278+
// SIMD Swizzle
42154279
SwizzleVecI8x16)
42164280
.add(FeatureSet::FP16,
42174281
EqVecF16x8,
@@ -4226,7 +4290,9 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
42264290
MulVecF16x8,
42274291
DivVecF16x8,
42284292
MinVecF16x8,
4229-
MaxVecF16x8)),
4293+
MaxVecF16x8,
4294+
PMinVecF16x8,
4295+
PMaxVecF16x8)),
42304296
make(Type::v128),
42314297
make(Type::v128)});
42324298
}
@@ -4559,7 +4625,6 @@ Expression* TranslateToFuzzReader::makeSIMDShift() {
45594625
}
45604626

45614627
Expression* TranslateToFuzzReader::makeSIMDLoad() {
4562-
// TODO: add Load{32,64}Zero if merged to proposal
45634628
SIMDLoadOp op = pick(Load8SplatVec128,
45644629
Load16SplatVec128,
45654630
Load32SplatVec128,
@@ -4569,7 +4634,9 @@ Expression* TranslateToFuzzReader::makeSIMDLoad() {
45694634
Load16x4SVec128,
45704635
Load16x4UVec128,
45714636
Load32x2SVec128,
4572-
Load32x2UVec128);
4637+
Load32x2UVec128,
4638+
Load32ZeroVec128,
4639+
Load64ZeroVec128);
45734640
Address offset = logify(get());
45744641
Address align;
45754642
switch (op) {
@@ -4592,8 +4659,11 @@ Expression* TranslateToFuzzReader::makeSIMDLoad() {
45924659
align = pick(1, 2, 4, 8);
45934660
break;
45944661
case Load32ZeroVec128:
4662+
align = 4;
4663+
break;
45954664
case Load64ZeroVec128:
4596-
WASM_UNREACHABLE("Unexpected SIMD loads");
4665+
align = 8;
4666+
break;
45974667
}
45984668
Expression* ptr = makePointer();
45994669
return builder.makeSIMDLoad(op, offset, align, ptr, wasm.memories[0]->name);

‎test/passes/translate-to-fuzz_all-features_metrics_noprint.txt

Lines changed: 26 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -9,48 +9,49 @@ total
99
[table-data] : 5
1010
[tables] : 2
1111
[tags] : 3
12-
[total] : 917
13-
[vars] : 42
12+
[total] : 921
13+
[vars] : 46
1414
ArrayNewFixed : 1
1515
AtomicCmpxchg : 1
16+
AtomicNotify : 1
1617
AtomicRMW : 1
17-
Binary : 94
18-
Block : 127
19-
Break : 4
20-
Call : 40
18+
Binary : 97
19+
Block : 134
20+
BrOn : 1
21+
Break : 6
22+
Call : 37
2123
CallIndirect : 1
2224
CallRef : 1
23-
Const : 170
25+
Const : 177
2426
DataDrop : 2
25-
Drop : 16
26-
GlobalGet : 61
27+
Drop : 18
28+
GlobalGet : 62
2729
GlobalSet : 54
2830
I31Get : 2
29-
If : 33
30-
Load : 23
31-
LocalGet : 70
32-
LocalSet : 42
31+
If : 35
32+
Load : 25
33+
LocalGet : 58
34+
LocalSet : 43
3335
Loop : 9
3436
MemoryCopy : 3
3537
MemoryFill : 1
36-
Nop : 7
37-
Pop : 4
38-
RefAs : 2
38+
Nop : 12
39+
Pop : 5
3940
RefEq : 5
40-
RefFunc : 6
41+
RefFunc : 7
4142
RefI31 : 8
42-
RefNull : 2
43+
RefNull : 1
4344
Return : 12
44-
SIMDExtract : 3
45+
SIMDExtract : 2
4546
Select : 7
46-
Store : 2
47+
Store : 1
4748
StringConst : 7
4849
StringEq : 3
49-
StructNew : 5
50+
StructNew : 6
51+
TableSet : 1
5052
Throw : 1
5153
Try : 4
52-
TryTable : 4
53-
TupleExtract : 13
54-
TupleMake : 3
55-
Unary : 36
54+
TryTable : 3
55+
TupleMake : 1
56+
Unary : 38
5657
Unreachable : 27

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