[FEATURE] Support verilog `line macro #300
Description
- [x ] I have reviewed this project's contribution guidelines
Describe the problem/limitation you think should be addressed
Currently `line directives are ignored.
I added erroneous RDL in this test after the `line directive
The compiler failed, but the reported source-location is not file asdf line 123.
Describe the solution you'd like
Support the `line macro.
Describe alternatives you've considered
None. We are inserting RDL code into frozen-source RDL, and we want errors to point to the inserted-RDL source files.
Additional context
None.