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static DEFINE_MUTEX (mbox_lock );
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- static int send_mbox_cmd (struct pci_dev * pdev , u16 cmd_id , u32 cmd_data , u64 * cmd_resp )
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+ static int wait_for_mbox_ready (struct proc_thermal_device * proc_priv )
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{
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- struct proc_thermal_device * proc_priv ;
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u32 retries , data ;
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int ret ;
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- mutex_lock (& mbox_lock );
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- proc_priv = pci_get_drvdata (pdev );
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-
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/* Poll for rb bit == 0 */
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retries = MBOX_RETRY_COUNT ;
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do {
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- data = readl (( void __iomem * ) ( proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ) );
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+ data = readl (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE );
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if (data & BIT_ULL (MBOX_BUSY_BIT )) {
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ret = - EBUSY ;
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continue ;
@@ -45,53 +41,78 @@ static int send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u64 *cm
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break ;
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} while (-- retries );
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+ return ret ;
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+ }
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+
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+ static int send_mbox_write_cmd (struct pci_dev * pdev , u16 id , u32 data )
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+ {
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+ struct proc_thermal_device * proc_priv ;
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+ u32 reg_data ;
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+ int ret ;
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+
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+ proc_priv = pci_get_drvdata (pdev );
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+
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+ mutex_lock (& mbox_lock );
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+
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+ ret = wait_for_mbox_ready (proc_priv );
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if (ret )
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goto unlock_mbox ;
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- if (cmd_id == MBOX_CMD_WORKLOAD_TYPE_WRITE )
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- writel (cmd_data , (void __iomem * ) ((proc_priv -> mmio_base + MBOX_OFFSET_DATA )));
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-
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+ writel (data , (proc_priv -> mmio_base + MBOX_OFFSET_DATA ));
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/* Write command register */
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- data = BIT_ULL (MBOX_BUSY_BIT ) | cmd_id ;
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- writel (data , (void __iomem * ) (( proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ) ));
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+ reg_data = BIT_ULL (MBOX_BUSY_BIT ) | id ;
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+ writel (reg_data , (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ));
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- /* Poll for rb bit == 0 */
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- retries = MBOX_RETRY_COUNT ;
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- do {
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- data = readl ((void __iomem * ) (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ));
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- if (data & BIT_ULL (MBOX_BUSY_BIT )) {
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- ret = - EBUSY ;
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- continue ;
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- }
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+ ret = wait_for_mbox_ready (proc_priv );
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- if ( data ) {
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- ret = - ENXIO ;
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- goto unlock_mbox ;
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- }
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+ unlock_mbox :
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+ mutex_unlock ( & mbox_lock ) ;
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+ return ret ;
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+ }
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- ret = 0 ;
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+ static int send_mbox_read_cmd (struct pci_dev * pdev , u16 id , u64 * resp )
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+ {
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+ struct proc_thermal_device * proc_priv ;
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+ u32 reg_data ;
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+ int ret ;
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- if (!cmd_resp )
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- break ;
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+ proc_priv = pci_get_drvdata (pdev );
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- if (cmd_id == MBOX_CMD_WORKLOAD_TYPE_READ )
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- * cmd_resp = readl ((void __iomem * ) (proc_priv -> mmio_base + MBOX_OFFSET_DATA ));
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- else
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- * cmd_resp = readq ((void __iomem * ) (proc_priv -> mmio_base + MBOX_OFFSET_DATA ));
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+ mutex_lock (& mbox_lock );
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- break ;
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- } while (-- retries );
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+ ret = wait_for_mbox_ready (proc_priv );
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+ if (ret )
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+ goto unlock_mbox ;
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+
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+ /* Write command register */
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+ reg_data = BIT_ULL (MBOX_BUSY_BIT ) | id ;
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+ writel (reg_data , (proc_priv -> mmio_base + MBOX_OFFSET_INTERFACE ));
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+
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+ ret = wait_for_mbox_ready (proc_priv );
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+ if (ret )
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+ goto unlock_mbox ;
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+
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+ if (id == MBOX_CMD_WORKLOAD_TYPE_READ )
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+ * resp = readl (proc_priv -> mmio_base + MBOX_OFFSET_DATA );
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+ else
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+ * resp = readq (proc_priv -> mmio_base + MBOX_OFFSET_DATA );
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unlock_mbox :
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mutex_unlock (& mbox_lock );
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return ret ;
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}
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- int processor_thermal_send_mbox_cmd (struct pci_dev * pdev , u16 cmd_id , u32 cmd_data , u64 * cmd_resp )
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+ int processor_thermal_send_mbox_read_cmd (struct pci_dev * pdev , u16 id , u64 * resp )
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{
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- return send_mbox_cmd (pdev , cmd_id , cmd_data , cmd_resp );
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+ return send_mbox_read_cmd (pdev , id , resp );
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}
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- EXPORT_SYMBOL_GPL (processor_thermal_send_mbox_cmd );
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+ EXPORT_SYMBOL_NS_GPL (processor_thermal_send_mbox_read_cmd , INT340X_THERMAL );
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+
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+ int processor_thermal_send_mbox_write_cmd (struct pci_dev * pdev , u16 id , u32 data )
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+ {
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+ return send_mbox_write_cmd (pdev , id , data );
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+ }
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+ EXPORT_SYMBOL_NS_GPL (processor_thermal_send_mbox_write_cmd , INT340X_THERMAL );
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/* List of workload types */
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static const char * const workload_types [] = {
@@ -104,7 +125,6 @@ static const char * const workload_types[] = {
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NULL
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};
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-
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static ssize_t workload_available_types_show (struct device * dev ,
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struct device_attribute * attr ,
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char * buf )
@@ -146,7 +166,7 @@ static ssize_t workload_type_store(struct device *dev,
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data |= ret ;
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- ret = send_mbox_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_WRITE , data , NULL );
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+ ret = send_mbox_write_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_WRITE , data );
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if (ret )
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return false;
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@@ -161,7 +181,7 @@ static ssize_t workload_type_show(struct device *dev,
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u64 cmd_resp ;
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int ret ;
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- ret = send_mbox_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , 0 , & cmd_resp );
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+ ret = send_mbox_read_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , & cmd_resp );
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if (ret )
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return false;
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@@ -186,8 +206,6 @@ static const struct attribute_group workload_req_attribute_group = {
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.name = "workload_request"
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};
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-
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-
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static bool workload_req_created ;
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int proc_thermal_mbox_add (struct pci_dev * pdev , struct proc_thermal_device * proc_priv )
@@ -196,7 +214,7 @@ int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc
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int ret ;
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/* Check if there is a mailbox support, if fails return success */
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- ret = send_mbox_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , 0 , & cmd_resp );
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+ ret = send_mbox_read_cmd (pdev , MBOX_CMD_WORKLOAD_TYPE_READ , & cmd_resp );
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if (ret )
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return 0 ;
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