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ambarusJassi Brar
ambarus
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Jassi Brar
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mailbox: add Samsung Exynos driver
The Samsung Exynos mailbox controller, used on Google GS101 SoC, has 16 flag bits for hardware interrupt generation and a shared register for passing mailbox messages. When the controller is used by the ACPM interface the shared register is ignored and the mailbox controller acts as a doorbell. The controller just raises the interrupt to APM after the ACPM interface has written the message to SRAM. Add support for the Samsung Exynos mailbox controller. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
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‎drivers/mailbox/Kconfig

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@@ -36,6 +36,17 @@ config ARM_MHU_V3
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that provides different means of transports: supported extensions
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will be discovered and possibly managed at probe-time.
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config EXYNOS_MBOX
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tristate "Exynos Mailbox"
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depends on ARCH_EXYNOS || COMPILE_TEST
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help
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Say Y here if you want to build the Samsung Exynos Mailbox controller
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driver. The controller has 16 flag bits for hardware interrupt
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generation and a shared register for passing mailbox messages.
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When the controller is used by the ACPM interface the shared register
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is ignored and the mailbox controller acts as a doorbell that raises
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the interrupt to the ACPM firmware.
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config IMX_MBOX
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tristate "i.MX Mailbox"
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depends on ARCH_MXC || COMPILE_TEST

‎drivers/mailbox/Makefile

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@@ -11,6 +11,8 @@ obj-$(CONFIG_ARM_MHU_V2) += arm_mhuv2.o
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obj-$(CONFIG_ARM_MHU_V3) += arm_mhuv3.o
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obj-$(CONFIG_EXYNOS_MBOX) += exynos-mailbox.o
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obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
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obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o

‎drivers/mailbox/exynos-mailbox.c

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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2020 Samsung Electronics Co., Ltd.
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* Copyright 2020 Google LLC.
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* Copyright 2024 Linaro Ltd.
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*/
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#include <linux/bitops.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/mailbox_controller.h>
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#include <linux/mailbox/exynos-message.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define EXYNOS_MBOX_MCUCTRL 0x0 /* Mailbox Control Register */
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#define EXYNOS_MBOX_INTCR0 0x24 /* Interrupt Clear Register 0 */
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#define EXYNOS_MBOX_INTMR0 0x28 /* Interrupt Mask Register 0 */
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#define EXYNOS_MBOX_INTSR0 0x2c /* Interrupt Status Register 0 */
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#define EXYNOS_MBOX_INTMSR0 0x30 /* Interrupt Mask Status Register 0 */
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#define EXYNOS_MBOX_INTGR1 0x40 /* Interrupt Generation Register 1 */
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#define EXYNOS_MBOX_INTMR1 0x48 /* Interrupt Mask Register 1 */
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#define EXYNOS_MBOX_INTSR1 0x4c /* Interrupt Status Register 1 */
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#define EXYNOS_MBOX_INTMSR1 0x50 /* Interrupt Mask Status Register 1 */
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#define EXYNOS_MBOX_INTMR0_MASK GENMASK(15, 0)
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#define EXYNOS_MBOX_INTGR1_MASK GENMASK(15, 0)
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#define EXYNOS_MBOX_CHAN_COUNT HWEIGHT32(EXYNOS_MBOX_INTGR1_MASK)
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/**
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* struct exynos_mbox - driver's private data.
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* @regs: mailbox registers base address.
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* @mbox: pointer to the mailbox controller.
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* @pclk: pointer to the mailbox peripheral clock.
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*/
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struct exynos_mbox {
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void __iomem *regs;
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struct mbox_controller *mbox;
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struct clk *pclk;
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};
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static int exynos_mbox_send_data(struct mbox_chan *chan, void *data)
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{
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struct device *dev = chan->mbox->dev;
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struct exynos_mbox *exynos_mbox = dev_get_drvdata(dev);
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struct exynos_mbox_msg *msg = data;
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if (msg->chan_id >= exynos_mbox->mbox->num_chans) {
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dev_err(dev, "Invalid channel ID %d\n", msg->chan_id);
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return -EINVAL;
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}
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if (msg->chan_type != EXYNOS_MBOX_CHAN_TYPE_DOORBELL) {
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dev_err(dev, "Unsupported channel type [%d]\n", msg->chan_type);
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return -EINVAL;
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};
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writel(BIT(msg->chan_id), exynos_mbox->regs + EXYNOS_MBOX_INTGR1);
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return 0;
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}
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static const struct mbox_chan_ops exynos_mbox_chan_ops = {
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.send_data = exynos_mbox_send_data,
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};
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static struct mbox_chan *exynos_mbox_of_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *sp)
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{
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int i;
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if (sp->args_count != 0)
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return ERR_PTR(-EINVAL);
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/*
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* Return the first available channel. When we don't pass the
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* channel ID from device tree, each channel populated by the driver is
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* just a software construct or a virtual channel. We use 'void *data'
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* in send_data() to pass the channel identifiers.
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*/
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for (i = 0; i < mbox->num_chans; i++)
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if (mbox->chans[i].cl == NULL)
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return &mbox->chans[i];
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return ERR_PTR(-EINVAL);
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}
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static const struct of_device_id exynos_mbox_match[] = {
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{ .compatible = "google,gs101-mbox" },
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{},
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};
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MODULE_DEVICE_TABLE(of, exynos_mbox_match);
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static int exynos_mbox_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct exynos_mbox *exynos_mbox;
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struct mbox_controller *mbox;
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struct mbox_chan *chans;
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int i;
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exynos_mbox = devm_kzalloc(dev, sizeof(*exynos_mbox), GFP_KERNEL);
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if (!exynos_mbox)
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return -ENOMEM;
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mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
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if (!mbox)
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return -ENOMEM;
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chans = devm_kcalloc(dev, EXYNOS_MBOX_CHAN_COUNT, sizeof(*chans),
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GFP_KERNEL);
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if (!chans)
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return -ENOMEM;
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exynos_mbox->regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(exynos_mbox->regs))
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return PTR_ERR(exynos_mbox->regs);
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exynos_mbox->pclk = devm_clk_get_enabled(dev, "pclk");
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if (IS_ERR(exynos_mbox->pclk))
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return dev_err_probe(dev, PTR_ERR(exynos_mbox->pclk),
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"Failed to enable clock.\n");
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mbox->num_chans = EXYNOS_MBOX_CHAN_COUNT;
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mbox->chans = chans;
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mbox->dev = dev;
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mbox->ops = &exynos_mbox_chan_ops;
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mbox->of_xlate = exynos_mbox_of_xlate;
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for (i = 0; i < EXYNOS_MBOX_CHAN_COUNT; i++)
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chans[i].mbox = mbox;
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exynos_mbox->mbox = mbox;
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platform_set_drvdata(pdev, exynos_mbox);
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/* Mask out all interrupts. We support just polling channels for now. */
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writel(EXYNOS_MBOX_INTMR0_MASK, exynos_mbox->regs + EXYNOS_MBOX_INTMR0);
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return devm_mbox_controller_register(dev, mbox);
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}
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static struct platform_driver exynos_mbox_driver = {
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.probe = exynos_mbox_probe,
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.driver = {
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.name = "exynos-acpm-mbox",
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.of_match_table = exynos_mbox_match,
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},
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};
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module_platform_driver(exynos_mbox_driver);
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MODULE_AUTHOR("Tudor Ambarus <tudor.ambarus@linaro.org>");
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MODULE_DESCRIPTION("Samsung Exynos mailbox driver");
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MODULE_LICENSE("GPL");

‎include/linux/mailbox/exynos-message.h

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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Exynos mailbox message.
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*
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* Copyright 2024 Linaro Ltd.
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*/
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#ifndef _LINUX_EXYNOS_MESSAGE_H_
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#define _LINUX_EXYNOS_MESSAGE_H_
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#define EXYNOS_MBOX_CHAN_TYPE_DOORBELL 0
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#define EXYNOS_MBOX_CHAN_TYPE_DATA 1
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struct exynos_mbox_msg {
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unsigned int chan_id;
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unsigned int chan_type;
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};
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#endif /* _LINUX_EXYNOS_MESSAGE_H_ */

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