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Merge branch 'for-v6.0/samsung-clk-dt-bindings' into next/clk
Merge bindings with clock IDs for ExynosAutov9 and Exynos850. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2 parents 0e1b2f1 + 8f3fc0e commit faeb276

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4 files changed

+346
-31
lines changed

4 files changed

+346
-31
lines changed

‎Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml

Lines changed: 69 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,10 +33,13 @@ properties:
3333
enum:
3434
- samsung,exynos850-cmu-top
3535
- samsung,exynos850-cmu-apm
36+
- samsung,exynos850-cmu-aud
3637
- samsung,exynos850-cmu-cmgp
3738
- samsung,exynos850-cmu-core
3839
- samsung,exynos850-cmu-dpu
3940
- samsung,exynos850-cmu-hsi
41+
- samsung,exynos850-cmu-is
42+
- samsung,exynos850-cmu-mfcmscl
4043
- samsung,exynos850-cmu-peri
4144

4245
clocks:
@@ -88,6 +91,24 @@ allOf:
8891
- const: oscclk
8992
- const: dout_clkcmu_apm_bus
9093

94+
- if:
95+
properties:
96+
compatible:
97+
contains:
98+
const: samsung,exynos850-cmu-aud
99+
100+
then:
101+
properties:
102+
clocks:
103+
items:
104+
- description: External reference clock (26 MHz)
105+
- description: AUD clock (from CMU_TOP)
106+
107+
clock-names:
108+
items:
109+
- const: oscclk
110+
- const: dout_aud
111+
91112
- if:
92113
properties:
93114
compatible:
@@ -172,6 +193,54 @@ allOf:
172193
- const: dout_hsi_mmc_card
173194
- const: dout_hsi_usb20drd
174195

196+
- if:
197+
properties:
198+
compatible:
199+
contains:
200+
const: samsung,exynos850-cmu-is
201+
202+
then:
203+
properties:
204+
clocks:
205+
items:
206+
- description: External reference clock (26 MHz)
207+
- description: CMU_IS bus clock (from CMU_TOP)
208+
- description: Image Texture Processing core clock (from CMU_TOP)
209+
- description: Visual Recognition Accelerator clock (from CMU_TOP)
210+
- description: Geometric Distortion Correction clock (from CMU_TOP)
211+
212+
clock-names:
213+
items:
214+
- const: oscclk
215+
- const: dout_is_bus
216+
- const: dout_is_itp
217+
- const: dout_is_vra
218+
- const: dout_is_gdc
219+
220+
- if:
221+
properties:
222+
compatible:
223+
contains:
224+
const: samsung,exynos850-cmu-mfcmscl
225+
226+
then:
227+
properties:
228+
clocks:
229+
items:
230+
- description: External reference clock (26 MHz)
231+
- description: Multi-Format Codec clock (from CMU_TOP)
232+
- description: Memory to Memory Scaler clock (from CMU_TOP)
233+
- description: Multi-Channel Scaler clock (from CMU_TOP)
234+
- description: JPEG codec clock (from CMU_TOP)
235+
236+
clock-names:
237+
items:
238+
- const: oscclk
239+
- const: dout_mfcmscl_mfc
240+
- const: dout_mfcmscl_m2m
241+
- const: dout_mfcmscl_mcsc
242+
- const: dout_mfcmscl_jpeg
243+
175244
- if:
176245
properties:
177246
compatible:

‎Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,8 @@ properties:
3535
- samsung,exynosautov9-cmu-top
3636
- samsung,exynosautov9-cmu-busmc
3737
- samsung,exynosautov9-cmu-core
38+
- samsung,exynosautov9-cmu-fsys0
39+
- samsung,exynosautov9-cmu-fsys1
3840
- samsung,exynosautov9-cmu-fsys2
3941
- samsung,exynosautov9-cmu-peric0
4042
- samsung,exynosautov9-cmu-peric1
@@ -107,6 +109,48 @@ allOf:
107109
- const: oscclk
108110
- const: dout_clkcmu_core_bus
109111

112+
- if:
113+
properties:
114+
compatible:
115+
contains:
116+
const: samsung,exynosautov9-cmu-fsys0
117+
118+
then:
119+
properties:
120+
clocks:
121+
items:
122+
- description: External reference clock (26 MHz)
123+
- description: CMU_FSYS0 bus clock (from CMU_TOP)
124+
- description: CMU_FSYS0 pcie clock (from CMU_TOP)
125+
126+
clock-names:
127+
items:
128+
- const: oscclk
129+
- const: dout_clkcmu_fsys0_bus
130+
- const: dout_clkcmu_fsys0_pcie
131+
132+
- if:
133+
properties:
134+
compatible:
135+
contains:
136+
const: samsung,exynosautov9-cmu-fsys1
137+
138+
then:
139+
properties:
140+
clocks:
141+
items:
142+
- description: External reference clock (26 MHz)
143+
- description: CMU_FSYS1 bus clock (from CMU_TOP)
144+
- description: CMU_FSYS1 mmc card clock (from CMU_TOP)
145+
- description: CMU_FSYS1 usb clock (from CMU_TOP)
146+
147+
clock-names:
148+
items:
149+
- const: oscclk
150+
- const: dout_clkcmu_fsys1_bus
151+
- const: dout_clkcmu_fsys1_mmc_card
152+
- const: dout_clkcmu_fsys1_usbdrd
153+
110154
- if:
111155
properties:
112156
compatible:

‎include/dt-bindings/clock/exynos850.h

Lines changed: 135 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,34 @@
5858
#define CLK_MOUT_CLKCMU_APM_BUS 46
5959
#define CLK_DOUT_CLKCMU_APM_BUS 47
6060
#define CLK_GOUT_CLKCMU_APM_BUS 48
61-
#define TOP_NR_CLK 49
61+
#define CLK_MOUT_AUD 49
62+
#define CLK_GOUT_AUD 50
63+
#define CLK_DOUT_AUD 51
64+
#define CLK_MOUT_IS_BUS 52
65+
#define CLK_MOUT_IS_ITP 53
66+
#define CLK_MOUT_IS_VRA 54
67+
#define CLK_MOUT_IS_GDC 55
68+
#define CLK_GOUT_IS_BUS 56
69+
#define CLK_GOUT_IS_ITP 57
70+
#define CLK_GOUT_IS_VRA 58
71+
#define CLK_GOUT_IS_GDC 59
72+
#define CLK_DOUT_IS_BUS 60
73+
#define CLK_DOUT_IS_ITP 61
74+
#define CLK_DOUT_IS_VRA 62
75+
#define CLK_DOUT_IS_GDC 63
76+
#define CLK_MOUT_MFCMSCL_MFC 64
77+
#define CLK_MOUT_MFCMSCL_M2M 65
78+
#define CLK_MOUT_MFCMSCL_MCSC 66
79+
#define CLK_MOUT_MFCMSCL_JPEG 67
80+
#define CLK_GOUT_MFCMSCL_MFC 68
81+
#define CLK_GOUT_MFCMSCL_M2M 69
82+
#define CLK_GOUT_MFCMSCL_MCSC 70
83+
#define CLK_GOUT_MFCMSCL_JPEG 71
84+
#define CLK_DOUT_MFCMSCL_MFC 72
85+
#define CLK_DOUT_MFCMSCL_M2M 73
86+
#define CLK_DOUT_MFCMSCL_MCSC 74
87+
#define CLK_DOUT_MFCMSCL_JPEG 75
88+
#define TOP_NR_CLK 76
6289

6390
/* CMU_APM */
6491
#define CLK_RCO_I3C_PMIC 1
@@ -87,6 +114,69 @@
87114
#define CLK_GOUT_SYSREG_APM_PCLK 24
88115
#define APM_NR_CLK 25
89116

117+
/* CMU_AUD */
118+
#define CLK_DOUT_AUD_AUDIF 1
119+
#define CLK_DOUT_AUD_BUSD 2
120+
#define CLK_DOUT_AUD_BUSP 3
121+
#define CLK_DOUT_AUD_CNT 4
122+
#define CLK_DOUT_AUD_CPU 5
123+
#define CLK_DOUT_AUD_CPU_ACLK 6
124+
#define CLK_DOUT_AUD_CPU_PCLKDBG 7
125+
#define CLK_DOUT_AUD_FM 8
126+
#define CLK_DOUT_AUD_FM_SPDY 9
127+
#define CLK_DOUT_AUD_MCLK 10
128+
#define CLK_DOUT_AUD_UAIF0 11
129+
#define CLK_DOUT_AUD_UAIF1 12
130+
#define CLK_DOUT_AUD_UAIF2 13
131+
#define CLK_DOUT_AUD_UAIF3 14
132+
#define CLK_DOUT_AUD_UAIF4 15
133+
#define CLK_DOUT_AUD_UAIF5 16
134+
#define CLK_DOUT_AUD_UAIF6 17
135+
#define CLK_FOUT_AUD_PLL 18
136+
#define CLK_GOUT_AUD_ABOX_ACLK 19
137+
#define CLK_GOUT_AUD_ASB_CCLK 20
138+
#define CLK_GOUT_AUD_CA32_CCLK 21
139+
#define CLK_GOUT_AUD_CNT_BCLK 22
140+
#define CLK_GOUT_AUD_CODEC_MCLK 23
141+
#define CLK_GOUT_AUD_DAP_CCLK 24
142+
#define CLK_GOUT_AUD_GPIO_PCLK 25
143+
#define CLK_GOUT_AUD_PPMU_ACLK 26
144+
#define CLK_GOUT_AUD_PPMU_PCLK 27
145+
#define CLK_GOUT_AUD_SPDY_BCLK 28
146+
#define CLK_GOUT_AUD_SYSMMU_CLK 29
147+
#define CLK_GOUT_AUD_SYSREG_PCLK 30
148+
#define CLK_GOUT_AUD_TZPC_PCLK 31
149+
#define CLK_GOUT_AUD_UAIF0_BCLK 32
150+
#define CLK_GOUT_AUD_UAIF1_BCLK 33
151+
#define CLK_GOUT_AUD_UAIF2_BCLK 34
152+
#define CLK_GOUT_AUD_UAIF3_BCLK 35
153+
#define CLK_GOUT_AUD_UAIF4_BCLK 36
154+
#define CLK_GOUT_AUD_UAIF5_BCLK 37
155+
#define CLK_GOUT_AUD_UAIF6_BCLK 38
156+
#define CLK_GOUT_AUD_WDT_PCLK 39
157+
#define CLK_MOUT_AUD_CPU 40
158+
#define CLK_MOUT_AUD_CPU_HCH 41
159+
#define CLK_MOUT_AUD_CPU_USER 42
160+
#define CLK_MOUT_AUD_FM 43
161+
#define CLK_MOUT_AUD_PLL 44
162+
#define CLK_MOUT_AUD_TICK_USB_USER 45
163+
#define CLK_MOUT_AUD_UAIF0 46
164+
#define CLK_MOUT_AUD_UAIF1 47
165+
#define CLK_MOUT_AUD_UAIF2 48
166+
#define CLK_MOUT_AUD_UAIF3 49
167+
#define CLK_MOUT_AUD_UAIF4 50
168+
#define CLK_MOUT_AUD_UAIF5 51
169+
#define CLK_MOUT_AUD_UAIF6 52
170+
#define IOCLK_AUDIOCDCLK0 53
171+
#define IOCLK_AUDIOCDCLK1 54
172+
#define IOCLK_AUDIOCDCLK2 55
173+
#define IOCLK_AUDIOCDCLK3 56
174+
#define IOCLK_AUDIOCDCLK4 57
175+
#define IOCLK_AUDIOCDCLK5 58
176+
#define IOCLK_AUDIOCDCLK6 59
177+
#define TICK_USB 60
178+
#define AUD_NR_CLK 61
179+
90180
/* CMU_CMGP */
91181
#define CLK_RCO_CMGP 1
92182
#define CLK_MOUT_CMGP_ADC 2
@@ -121,6 +211,50 @@
121211
#define CLK_GOUT_SYSREG_HSI_PCLK 13
122212
#define HSI_NR_CLK 14
123213

214+
/* CMU_IS */
215+
#define CLK_MOUT_IS_BUS_USER 1
216+
#define CLK_MOUT_IS_ITP_USER 2
217+
#define CLK_MOUT_IS_VRA_USER 3
218+
#define CLK_MOUT_IS_GDC_USER 4
219+
#define CLK_DOUT_IS_BUSP 5
220+
#define CLK_GOUT_IS_CMU_IS_PCLK 6
221+
#define CLK_GOUT_IS_CSIS0_ACLK 7
222+
#define CLK_GOUT_IS_CSIS1_ACLK 8
223+
#define CLK_GOUT_IS_CSIS2_ACLK 9
224+
#define CLK_GOUT_IS_TZPC_PCLK 10
225+
#define CLK_GOUT_IS_CSIS_DMA_CLK 11
226+
#define CLK_GOUT_IS_GDC_CLK 12
227+
#define CLK_GOUT_IS_IPP_CLK 13
228+
#define CLK_GOUT_IS_ITP_CLK 14
229+
#define CLK_GOUT_IS_MCSC_CLK 15
230+
#define CLK_GOUT_IS_VRA_CLK 16
231+
#define CLK_GOUT_IS_PPMU_IS0_ACLK 17
232+
#define CLK_GOUT_IS_PPMU_IS0_PCLK 18
233+
#define CLK_GOUT_IS_PPMU_IS1_ACLK 19
234+
#define CLK_GOUT_IS_PPMU_IS1_PCLK 20
235+
#define CLK_GOUT_IS_SYSMMU_IS0_CLK 21
236+
#define CLK_GOUT_IS_SYSMMU_IS1_CLK 22
237+
#define CLK_GOUT_IS_SYSREG_PCLK 23
238+
#define IS_NR_CLK 24
239+
240+
/* CMU_MFCMSCL */
241+
#define CLK_MOUT_MFCMSCL_MFC_USER 1
242+
#define CLK_MOUT_MFCMSCL_M2M_USER 2
243+
#define CLK_MOUT_MFCMSCL_MCSC_USER 3
244+
#define CLK_MOUT_MFCMSCL_JPEG_USER 4
245+
#define CLK_DOUT_MFCMSCL_BUSP 5
246+
#define CLK_GOUT_MFCMSCL_CMU_MFCMSCL_PCLK 6
247+
#define CLK_GOUT_MFCMSCL_TZPC_PCLK 7
248+
#define CLK_GOUT_MFCMSCL_JPEG_ACLK 8
249+
#define CLK_GOUT_MFCMSCL_M2M_ACLK 9
250+
#define CLK_GOUT_MFCMSCL_MCSC_CLK 10
251+
#define CLK_GOUT_MFCMSCL_MFC_ACLK 11
252+
#define CLK_GOUT_MFCMSCL_PPMU_ACLK 12
253+
#define CLK_GOUT_MFCMSCL_PPMU_PCLK 13
254+
#define CLK_GOUT_MFCMSCL_SYSMMU_CLK 14
255+
#define CLK_GOUT_MFCMSCL_SYSREG_PCLK 15
256+
#define MFCMSCL_NR_CLK 16
257+
124258
/* CMU_PERI */
125259
#define CLK_MOUT_PERI_BUS_USER 1
126260
#define CLK_MOUT_PERI_UART_USER 2

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