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Merge tag 'devicetree-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring: "DT Bindings: - Add Bindings for QCom QCS615 UFS, QCom IPQ5424 DWC3 USB, NXP imx7d MIPI DSI, QCom SM8750 PDC, QCom MSM8976 SRAM, QCom ipq6018 temp sensor, QCom QCS8300 Power Domain Controller, QCom QCS615 Power Domain Controller, QCom QCS615 APSS, QCom QCS615 qfprom, QCom QCS8300 remoteproc, Mediatek MT6328 PMIC, Allwinner A100 OPP, and NXP iMX35 GPT - Convert Altera socfpga-system, raspberrypi,bcm2835-power to DT schema - Add Siflower vendor prefix - Cleanup display, interrupt-controller, and UFS binding examples' indentation - Document preferred line wrapping (the same as the rest of the kernel) DT Core: - Add warning when of_property_read_bool() is used on non-boolean properties - Restore keeping bootloader DTB when booting with ACPI. Turns out some x86 platforms relied on that. Shrug. - Fix of_find_node_opts_by_path() handling of alias+path+options - Fix resource bounds checking for empty resources - A bunch of small fixes/cleanups all over from Zijun Hu - Cleanups in bin_attribute handling" * tag 'devicetree-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (50 commits) of: address: Fix empty resource handling in __of_address_resource_bounds() of/fdt: Restore possibility to use both ACPI and FDT from bootloader docs: dt-bindings: Document preferred line wrapping dt-bindings: ufs: Correct indentation and style in DTS example of: Correct element count for two arrays in API of_parse_phandle_with_args_map() of: reserved-memory: Warn for missing static reserved memory regions of: Do not expose of_alias_scan() and correct its comments dt-bindings: ufs: qcom: Add UFS Host Controller for QCS615 dt-bindings: usb: qcom,dwc3: Add IPQ5424 to USB DWC3 bindings dt-bindings: arm: coresight: Update the pattern of ete node name of: Warn when of_property_read_bool() is used on non-boolean properties device property: Split property reading bool and presence test ops of/fdt: Check fdt_get_mem_rsv() error in early_init_fdt_scan_reserved_mem() of: reserved-memory: Move an assignment to effective place in __reserved_mem_alloc_size() of: reserved-memory: Do not make kmemleak ignore freed address of: reserved-memory: Fix using wrong number of cells to get property 'alignment' of: Remove a duplicated code block of: property: Avoiding using uninitialized variable @imaplen in parse_interrupt_map() of: Correct child specifier used as input of the 2nd nexus node dt-bindings: interrupt-controller: ti,omap4-wugen-mpu: Add file extension ...
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Documentation/devicetree/bindings/arm/altera/socfpga-system.txt

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This file was deleted.

Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml

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Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ description: |
2323
2424
properties:
2525
$nodename:
26-
pattern: "^ete([0-9a-f]+)$"
26+
pattern: "^ete(-[0-9]+)?$"
2727
compatible:
2828
items:
2929
- const: arm,embedded-trace-extension
@@ -55,13 +55,13 @@ examples:
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5656
# An ETE node without legacy CoreSight connections
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- |
58-
ete0 {
58+
ete-0 {
5959
compatible = "arm,embedded-trace-extension";
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cpu = <&cpu_0>;
6161
};
6262
# An ETE node with legacy CoreSight connections
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- |
64-
ete1 {
64+
ete-1 {
6565
compatible = "arm,embedded-trace-extension";
6666
cpu = <&cpu_1>;
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Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -148,10 +148,10 @@ examples:
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/* TMDS Output */
150150
hdmi_tx_tmds_port: port@1 {
151-
reg = <1>;
151+
reg = <1>;
152152
153-
hdmi_tx_tmds_out: endpoint {
154-
remote-endpoint = <&hdmi_connector_in>;
155-
};
153+
hdmi_tx_tmds_out: endpoint {
154+
remote-endpoint = <&hdmi_connector_in>;
155+
};
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};
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};

Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml

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@@ -82,21 +82,21 @@ examples:
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power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
8383
reg-io-width = <1>;
8484
ports {
85-
#address-cells = <1>;
86-
#size-cells = <0>;
87-
port@0 {
88-
reg = <0>;
89-
90-
hdmi_tx_from_pvi: endpoint {
91-
remote-endpoint = <&pvi_to_hdmi_tx>;
92-
};
93-
};
94-
95-
port@1 {
96-
reg = <1>;
97-
hdmi_tx_out: endpoint {
98-
remote-endpoint = <&hdmi0_con>;
99-
};
100-
};
85+
#address-cells = <1>;
86+
#size-cells = <0>;
87+
port@0 {
88+
reg = <0>;
89+
90+
endpoint {
91+
remote-endpoint = <&pvi_to_hdmi_tx>;
92+
};
93+
};
94+
95+
port@1 {
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reg = <1>;
97+
endpoint {
98+
remote-endpoint = <&hdmi0_con>;
99+
};
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};
101101
};
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};

Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml

Lines changed: 39 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,9 @@ properties:
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- fsl,imx8mm-mipi-dsim
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- fsl,imx8mp-mipi-dsim
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- items:
30-
- const: fsl,imx8mn-mipi-dsim
30+
- enum:
31+
- fsl,imx7d-mipi-dsim
32+
- fsl,imx8mn-mipi-dsim
3133
- const: fsl,imx8mm-mipi-dsim
3234

3335
reg:
@@ -241,40 +243,40 @@ examples:
241243
#include <dt-bindings/interrupt-controller/arm-gic.h>
242244
243245
dsi@13900000 {
244-
compatible = "samsung,exynos5433-mipi-dsi";
245-
reg = <0x13900000 0xC0>;
246-
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
247-
phys = <&mipi_phy 1>;
248-
phy-names = "dsim";
249-
clocks = <&cmu_disp CLK_PCLK_DSIM0>,
250-
<&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8>,
251-
<&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>,
252-
<&cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0>,
253-
<&cmu_disp CLK_SCLK_DSIM0>;
254-
clock-names = "bus_clk",
255-
"phyclk_mipidphy0_bitclkdiv8",
256-
"phyclk_mipidphy0_rxclkesc0",
257-
"sclk_rgb_vclk_to_dsim0",
258-
"sclk_mipi";
259-
power-domains = <&pd_disp>;
260-
vddcore-supply = <&ldo6_reg>;
261-
vddio-supply = <&ldo7_reg>;
262-
samsung,burst-clock-frequency = <512000000>;
263-
samsung,esc-clock-frequency = <16000000>;
264-
samsung,pll-clock-frequency = <24000000>;
265-
pinctrl-names = "default";
266-
pinctrl-0 = <&te_irq>;
267-
268-
ports {
269-
#address-cells = <1>;
270-
#size-cells = <0>;
271-
272-
port@0 {
273-
reg = <0>;
274-
275-
dsi_to_mic: endpoint {
276-
remote-endpoint = <&mic_to_dsi>;
277-
};
278-
};
279-
};
246+
compatible = "samsung,exynos5433-mipi-dsi";
247+
reg = <0x13900000 0xC0>;
248+
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
249+
phys = <&mipi_phy 1>;
250+
phy-names = "dsim";
251+
clocks = <&cmu_disp CLK_PCLK_DSIM0>,
252+
<&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8>,
253+
<&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>,
254+
<&cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0>,
255+
<&cmu_disp CLK_SCLK_DSIM0>;
256+
clock-names = "bus_clk",
257+
"phyclk_mipidphy0_bitclkdiv8",
258+
"phyclk_mipidphy0_rxclkesc0",
259+
"sclk_rgb_vclk_to_dsim0",
260+
"sclk_mipi";
261+
power-domains = <&pd_disp>;
262+
vddcore-supply = <&ldo6_reg>;
263+
vddio-supply = <&ldo7_reg>;
264+
samsung,burst-clock-frequency = <512000000>;
265+
samsung,esc-clock-frequency = <16000000>;
266+
samsung,pll-clock-frequency = <24000000>;
267+
pinctrl-names = "default";
268+
pinctrl-0 = <&te_irq>;
269+
270+
ports {
271+
#address-cells = <1>;
272+
#size-cells = <0>;
273+
274+
port@0 {
275+
reg = <0>;
276+
277+
dsi_to_mic: endpoint {
278+
remote-endpoint = <&mic_to_dsi>;
279+
};
280+
};
281+
};
280282
};

Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml

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Original file line numberDiff line numberDiff line change
@@ -104,30 +104,30 @@ examples:
104104
#size-cells = <2>;
105105
106106
aal@14015000 {
107-
compatible = "mediatek,mt8173-disp-aal";
108-
reg = <0 0x14015000 0 0x1000>;
109-
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>;
110-
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
111-
clocks = <&mmsys CLK_MM_DISP_AAL>;
112-
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
113-
114-
ports {
115-
#address-cells = <1>;
116-
#size-cells = <0>;
117-
118-
port@0 {
119-
reg = <0>;
120-
aal0_in: endpoint {
121-
remote-endpoint = <&ccorr0_out>;
122-
};
123-
};
124-
125-
port@1 {
126-
reg = <1>;
127-
aal0_out: endpoint {
128-
remote-endpoint = <&gamma0_in>;
129-
};
130-
};
131-
};
132-
};
107+
compatible = "mediatek,mt8173-disp-aal";
108+
reg = <0 0x14015000 0 0x1000>;
109+
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>;
110+
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
111+
clocks = <&mmsys CLK_MM_DISP_AAL>;
112+
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
113+
114+
ports {
115+
#address-cells = <1>;
116+
#size-cells = <0>;
117+
118+
port@0 {
119+
reg = <0>;
120+
endpoint {
121+
remote-endpoint = <&ccorr0_out>;
122+
};
123+
};
124+
125+
port@1 {
126+
reg = <1>;
127+
endpoint {
128+
remote-endpoint = <&gamma0_in>;
129+
};
130+
};
131+
};
132+
};
133133
};

Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml

Lines changed: 59 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -418,63 +418,63 @@ unevaluatedProperties: false
418418

419419
examples:
420420
- |
421-
#include <dt-bindings/interrupt-controller/arm-gic.h>
422-
#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
423-
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
424-
#include <dt-bindings/power/qcom-rpmpd.h>
425-
426-
dsi@ae94000 {
427-
compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
428-
reg = <0x0ae94000 0x400>;
429-
reg-names = "dsi_ctrl";
430-
431-
#address-cells = <1>;
432-
#size-cells = <0>;
433-
434-
interrupt-parent = <&mdss>;
435-
interrupts = <4>;
436-
437-
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
438-
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
439-
<&dispcc DISP_CC_MDSS_PCLK0_CLK>,
440-
<&dispcc DISP_CC_MDSS_ESC0_CLK>,
441-
<&dispcc DISP_CC_MDSS_AHB_CLK>,
442-
<&dispcc DISP_CC_MDSS_AXI_CLK>;
443-
clock-names = "byte",
444-
"byte_intf",
445-
"pixel",
446-
"core",
447-
"iface",
448-
"bus";
449-
450-
phys = <&dsi0_phy>;
451-
phy-names = "dsi";
452-
453-
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
454-
assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
455-
456-
power-domains = <&rpmhpd SC7180_CX>;
457-
operating-points-v2 = <&dsi_opp_table>;
458-
459-
ports {
460-
#address-cells = <1>;
461-
#size-cells = <0>;
462-
463-
port@0 {
464-
reg = <0>;
465-
dsi0_in: endpoint {
466-
remote-endpoint = <&dpu_intf1_out>;
467-
};
468-
};
469-
470-
port@1 {
471-
reg = <1>;
472-
dsi0_out: endpoint {
473-
remote-endpoint = <&sn65dsi86_in>;
474-
data-lanes = <0 1 2 3>;
475-
qcom,te-source = "mdp_vsync_e";
476-
};
477-
};
478-
};
479-
};
421+
#include <dt-bindings/interrupt-controller/arm-gic.h>
422+
#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
423+
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
424+
#include <dt-bindings/power/qcom-rpmpd.h>
425+
426+
dsi@ae94000 {
427+
compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
428+
reg = <0x0ae94000 0x400>;
429+
reg-names = "dsi_ctrl";
430+
431+
#address-cells = <1>;
432+
#size-cells = <0>;
433+
434+
interrupt-parent = <&mdss>;
435+
interrupts = <4>;
436+
437+
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
438+
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
439+
<&dispcc DISP_CC_MDSS_PCLK0_CLK>,
440+
<&dispcc DISP_CC_MDSS_ESC0_CLK>,
441+
<&dispcc DISP_CC_MDSS_AHB_CLK>,
442+
<&dispcc DISP_CC_MDSS_AXI_CLK>;
443+
clock-names = "byte",
444+
"byte_intf",
445+
"pixel",
446+
"core",
447+
"iface",
448+
"bus";
449+
450+
phys = <&dsi0_phy>;
451+
phy-names = "dsi";
452+
453+
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
454+
assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
455+
456+
power-domains = <&rpmhpd SC7180_CX>;
457+
operating-points-v2 = <&dsi_opp_table>;
458+
459+
ports {
460+
#address-cells = <1>;
461+
#size-cells = <0>;
462+
463+
port@0 {
464+
reg = <0>;
465+
endpoint {
466+
remote-endpoint = <&dpu_intf1_out>;
467+
};
468+
};
469+
470+
port@1 {
471+
reg = <1>;
472+
endpoint {
473+
remote-endpoint = <&sn65dsi86_in>;
474+
data-lanes = <0 1 2 3>;
475+
qcom,te-source = "mdp_vsync_e";
476+
};
477+
};
478+
};
479+
};
480480
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