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Tom Rixvinodkoul
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dmaengine: dw-axi-dmac: cleanup comments
For spdx, /* */ for *.h, remove extra space Replacements configurarion to configuration inerrupts to interrupts chanels to channels Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20220309020056.1026106-1-trix@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c

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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com)
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/*
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/*
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* The set of bus widths supported by the DMA controller. DW AXI DMAC supports
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* master data bus width up to 512 bits (for both AXI master interfaces), but
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* it depends on IP block configurarion.
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* it depends on IP block configuration.
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*/
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#define AXI_DMA_BUSWIDTHS \
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(DMA_SLAVE_BUSWIDTH_1_BYTE | \
@@ -1089,10 +1089,10 @@ static irqreturn_t dw_axi_dma_interrupt(int irq, void *dev_id)
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u32 status, i;
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/* Disable DMAC inerrupts. We'll enable them after processing chanels */
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/* Disable DMAC interrupts. We'll enable them after processing channels */
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axi_dma_irq_disable(chip);
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/* Poll, clear and process every chanel interrupt status */
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/* Poll, clear and process every channel interrupt status */
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for (i = 0; i < dw->hdata->nr_channels; i++) {
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chan = &dw->chan[i];
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status = axi_chan_irq_read(chan);

drivers/dma/dw-axi-dmac/dw-axi-dmac.h

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// SPDX-License-Identifier: GPL-2.0
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/* SPDX-License-Identifier: GPL-2.0 */
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// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com)
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/*

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