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parisc: BTLB: Initialize BTLB tables at CPU startup
Initialize the BTLB entries when starting up a CPU. Note that BTLBs are not available on 64-bit CPUs. Signed-off-by: Helge Deller <deller@gmx.de>
1 parent 3756597 commit e5ef93d

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5 files changed

+77
-7
lines changed

5 files changed

+77
-7
lines changed

arch/parisc/include/asm/cache.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ extern int split_tlb;
3737
extern int dcache_stride;
3838
extern int icache_stride;
3939
extern struct pdc_cache_info cache_info;
40+
extern struct pdc_btlb_info btlb_info;
4041
void parisc_setup_cache_timing(void);
4142

4243
#define pdtlb(sr, addr) asm volatile("pdtlb 0(%%sr%0,%1)" \

arch/parisc/include/asm/processor.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -310,6 +310,7 @@ extern void do_syscall_trace_exit(struct pt_regs *);
310310
struct seq_file;
311311
extern void early_trap_init(void);
312312
extern void collect_boot_cpu_data(void);
313+
extern void btlb_init_per_cpu(void);
313314
extern int show_cpuinfo (struct seq_file *m, void *v);
314315

315316
/* driver code in driver/parisc */

arch/parisc/kernel/cache.c

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@ int pa_serialize_tlb_flushes __ro_after_init;
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5959
struct pdc_cache_info cache_info __ro_after_init;
6060
#ifndef CONFIG_PA20
61-
static struct pdc_btlb_info btlb_info __ro_after_init;
61+
struct pdc_btlb_info btlb_info __ro_after_init;
6262
#endif
6363

6464
DEFINE_STATIC_KEY_TRUE(parisc_has_cache);
@@ -264,12 +264,6 @@ parisc_cache_init(void)
264264
icache_stride = CAFL_STRIDE(cache_info.ic_conf);
265265
#undef CAFL_STRIDE
266266

267-
#ifndef CONFIG_PA20
268-
if (pdc_btlb_info(&btlb_info) < 0) {
269-
memset(&btlb_info, 0, sizeof btlb_info);
270-
}
271-
#endif
272-
273267
if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
274268
PDC_MODEL_NVA_UNSUPPORTED) {
275269
printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");

arch/parisc/kernel/processor.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -368,6 +368,8 @@ int init_per_cpu(int cpunum)
368368
/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
369369
init_percpu_prof(cpunum);
370370

371+
btlb_init_per_cpu();
372+
371373
return ret;
372374
}
373375

arch/parisc/mm/init.c

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#include <asm/sections.h>
3333
#include <asm/msgbuf.h>
3434
#include <asm/sparsemem.h>
35+
#include <asm/asm-offsets.h>
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3637
extern int data_start;
3738
extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
@@ -720,6 +721,77 @@ void __init paging_init(void)
720721
parisc_bootmem_free();
721722
}
722723

724+
static void alloc_btlb(unsigned long start, unsigned long end, int *slot,
725+
unsigned long entry_info)
726+
{
727+
const int slot_max = btlb_info.fixed_range_info.num_comb;
728+
int min_num_pages = btlb_info.min_size;
729+
unsigned long size;
730+
731+
/* map at minimum 4 pages */
732+
if (min_num_pages < 4)
733+
min_num_pages = 4;
734+
735+
size = HUGEPAGE_SIZE;
736+
while (start < end && *slot < slot_max && size >= PAGE_SIZE) {
737+
/* starting address must have same alignment as size! */
738+
/* if correctly aligned and fits in double size, increase */
739+
if (((start & (2 * size - 1)) == 0) &&
740+
(end - start) >= (2 * size)) {
741+
size <<= 1;
742+
continue;
743+
}
744+
/* if current size alignment is too big, try smaller size */
745+
if ((start & (size - 1)) != 0) {
746+
size >>= 1;
747+
continue;
748+
}
749+
if ((end - start) >= size) {
750+
if ((size >> PAGE_SHIFT) >= min_num_pages)
751+
pdc_btlb_insert(start >> PAGE_SHIFT, __pa(start) >> PAGE_SHIFT,
752+
size >> PAGE_SHIFT, entry_info, *slot);
753+
(*slot)++;
754+
start += size;
755+
continue;
756+
}
757+
size /= 2;
758+
continue;
759+
}
760+
}
761+
762+
void btlb_init_per_cpu(void)
763+
{
764+
unsigned long s, t, e;
765+
int slot;
766+
767+
/* BTLBs are not available on 64-bit CPUs */
768+
if (IS_ENABLED(CONFIG_PA20))
769+
return;
770+
else if (pdc_btlb_info(&btlb_info) < 0) {
771+
memset(&btlb_info, 0, sizeof btlb_info);
772+
}
773+
774+
/* insert BLTLBs for code and data segments */
775+
s = (uintptr_t) dereference_function_descriptor(&_stext);
776+
e = (uintptr_t) dereference_function_descriptor(&_etext);
777+
t = (uintptr_t) dereference_function_descriptor(&_sdata);
778+
BUG_ON(t != e);
779+
780+
/* code segments */
781+
slot = 0;
782+
alloc_btlb(s, e, &slot, 0x13800000);
783+
784+
/* sanity check */
785+
t = (uintptr_t) dereference_function_descriptor(&_edata);
786+
e = (uintptr_t) dereference_function_descriptor(&__bss_start);
787+
BUG_ON(t != e);
788+
789+
/* data segments */
790+
s = (uintptr_t) dereference_function_descriptor(&_sdata);
791+
e = (uintptr_t) dereference_function_descriptor(&__bss_stop);
792+
alloc_btlb(s, e, &slot, 0x11800000);
793+
}
794+
723795
#ifdef CONFIG_PA20
724796

725797
/*

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