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Merge tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into HEAD
RISC-V soc fixes for v6.12-rc6 StarFive: Two minor dts fixes, one setting the correct eth phy delay parameters and one disabling unused nodes that caused warnings at probe time. Firmware: Fix the poll_complete() implementation in the auto-update driver so that it behaves as the framework expects. Misc: Update the maintainer pattern for my dts entry, so that it covers the specific platforms listed , rather than including all riscv platforms with the list platforms excluded. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-soc-fixes-for-v6.12-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: invert Misc RISC-V SoC Support's pattern riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64 riscv: dts: starfive: disable unused csi/camss nodes firmware: microchip: auto-update: fix poll_complete() to not report spurious timeout errors Link: https://lore.kernel.org/r/20241031-colossal-cassette-617817c9bec3@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 896dcf4 + 384f202 commit e5c06ef

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MAINTAINERS

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -19786,12 +19786,10 @@ L: linux-riscv@lists.infradead.org
1978619786
S: Maintained
1978719787
Q: https://patchwork.kernel.org/project/linux-riscv/list/
1978819788
T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
19789-
F: Documentation/devicetree/bindings/riscv/
19790-
F: arch/riscv/boot/dts/
19791-
X: arch/riscv/boot/dts/allwinner/
19792-
X: arch/riscv/boot/dts/renesas/
19793-
X: arch/riscv/boot/dts/sophgo/
19794-
X: arch/riscv/boot/dts/thead/
19789+
F: arch/riscv/boot/dts/canaan/
19790+
F: arch/riscv/boot/dts/microchip/
19791+
F: arch/riscv/boot/dts/sifive/
19792+
F: arch/riscv/boot/dts/starfive/
1979519793

1979619794
RISC-V PMU DRIVERS
1979719795
M: Atish Patra <atishp@atishpatra.org>

arch/riscv/boot/dts/starfive/jh7110-common.dtsi

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,6 @@
128128
assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
129129
<&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
130130
assigned-clock-rates = <49500000>, <198000000>;
131-
status = "okay";
132131

133132
ports {
134133
#address-cells = <1>;
@@ -151,7 +150,6 @@
151150
&csi2rx {
152151
assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
153152
assigned-clock-rates = <297000000>;
154-
status = "okay";
155153

156154
ports {
157155
#address-cells = <1>;

arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,7 @@
4444
};
4545

4646
&phy0 {
47-
rx-internal-delay-ps = <1900>;
48-
tx-internal-delay-ps = <1500>;
47+
rx-internal-delay-ps = <1500>;
4948
motorcomm,rx-clk-drv-microamp = <2910>;
5049
motorcomm,rx-data-drv-microamp = <2910>;
5150
motorcomm,tx-clk-adj-enabled;

drivers/firmware/microchip/mpfs-auto-update.c

Lines changed: 7 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -76,14 +76,11 @@
7676
#define AUTO_UPDATE_INFO_SIZE SZ_1M
7777
#define AUTO_UPDATE_BITSTREAM_BASE (AUTO_UPDATE_DIRECTORY_SIZE + AUTO_UPDATE_INFO_SIZE)
7878

79-
#define AUTO_UPDATE_TIMEOUT_MS 60000
80-
8179
struct mpfs_auto_update_priv {
8280
struct mpfs_sys_controller *sys_controller;
8381
struct device *dev;
8482
struct mtd_info *flash;
8583
struct fw_upload *fw_uploader;
86-
struct completion programming_complete;
8784
size_t size_per_bitstream;
8885
bool cancel_request;
8986
};
@@ -156,19 +153,6 @@ static void mpfs_auto_update_cancel(struct fw_upload *fw_uploader)
156153

157154
static enum fw_upload_err mpfs_auto_update_poll_complete(struct fw_upload *fw_uploader)
158155
{
159-
struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;
160-
int ret;
161-
162-
/*
163-
* There is no meaningful way to get the status of the programming while
164-
* it is in progress, so attempting anything other than waiting for it
165-
* to complete would be misplaced.
166-
*/
167-
ret = wait_for_completion_timeout(&priv->programming_complete,
168-
msecs_to_jiffies(AUTO_UPDATE_TIMEOUT_MS));
169-
if (!ret)
170-
return FW_UPLOAD_ERR_TIMEOUT;
171-
172156
return FW_UPLOAD_ERR_NONE;
173157
}
174158

@@ -349,33 +333,23 @@ static enum fw_upload_err mpfs_auto_update_write(struct fw_upload *fw_uploader,
349333
u32 offset, u32 size, u32 *written)
350334
{
351335
struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;
352-
enum fw_upload_err err = FW_UPLOAD_ERR_NONE;
353336
int ret;
354337

355-
reinit_completion(&priv->programming_complete);
356-
357338
ret = mpfs_auto_update_write_bitstream(fw_uploader, data, offset, size, written);
358-
if (ret) {
359-
err = FW_UPLOAD_ERR_RW_ERROR;
360-
goto out;
361-
}
339+
if (ret)
340+
return FW_UPLOAD_ERR_RW_ERROR;
362341

363-
if (priv->cancel_request) {
364-
err = FW_UPLOAD_ERR_CANCELED;
365-
goto out;
366-
}
342+
if (priv->cancel_request)
343+
return FW_UPLOAD_ERR_CANCELED;
367344

368345
if (mpfs_auto_update_is_bitstream_info(data, size))
369-
goto out;
346+
return FW_UPLOAD_ERR_NONE;
370347

371348
ret = mpfs_auto_update_verify_image(fw_uploader);
372349
if (ret)
373-
err = FW_UPLOAD_ERR_FW_INVALID;
350+
return FW_UPLOAD_ERR_FW_INVALID;
374351

375-
out:
376-
complete(&priv->programming_complete);
377-
378-
return err;
352+
return FW_UPLOAD_ERR_NONE;
379353
}
380354

381355
static const struct fw_upload_ops mpfs_auto_update_ops = {
@@ -461,8 +435,6 @@ static int mpfs_auto_update_probe(struct platform_device *pdev)
461435
return dev_err_probe(dev, ret,
462436
"The current bitstream does not support auto-update\n");
463437

464-
init_completion(&priv->programming_complete);
465-
466438
fw_uploader = firmware_upload_register(THIS_MODULE, dev, "mpfs-auto-update",
467439
&mpfs_auto_update_ops, priv);
468440
if (IS_ERR(fw_uploader))

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