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AngeloGioacchino Del Regnowens
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clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux
This clock was being registered as clk-composite through the helpers for the same in the MediaTek clock APIs but, in reality, this isn't a composite clock. Appropriately register this clock with devm_clk_hw_register_mux(). No functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220927101128.44758-7-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
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drivers/clk/mediatek/clk-mt8195-topckgen.c

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1149,11 +1149,6 @@ static const struct mtk_mux top_mtk_muxes[] = {
11491149
*/
11501150
};
11511151

1152-
static struct mtk_composite top_muxes[] = {
1153-
/* CLK_MISC_CFG_3 */
1154-
MUX(CLK_TOP_MFG_CK_FAST_REF, "mfg_ck_fast_ref", mfg_fast_parents, 0x0250, 8, 1),
1155-
};
1156-
11571152
static const struct mtk_composite top_adj_divs[] = {
11581153
DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "top_i2si1_mck", 0x0320, 0, 0x0328, 8, 0),
11591154
DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "top_i2si2_mck", 0x0320, 1, 0x0328, 8, 8),
@@ -1226,6 +1221,7 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
12261221
{
12271222
struct clk_hw_onecell_data *top_clk_data;
12281223
struct device_node *node = pdev->dev.of_node;
1224+
struct clk_hw *hw;
12291225
int r;
12301226
void __iomem *base;
12311227

@@ -1253,15 +1249,17 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
12531249
if (r)
12541250
goto unregister_factors;
12551251

1256-
r = mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
1257-
&mt8195_clk_lock, top_clk_data);
1258-
if (r)
1252+
hw = devm_clk_hw_register_mux(&pdev->dev, "mfg_ck_fast_ref", mfg_fast_parents,
1253+
ARRAY_SIZE(mfg_fast_parents), CLK_SET_RATE_PARENT,
1254+
(base + 0x250), 8, 1, 0, &mt8195_clk_lock);
1255+
if (IS_ERR(hw))
12591256
goto unregister_muxes;
1257+
top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF] = hw;
12601258

12611259
r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
12621260
&mt8195_clk_lock, top_clk_data);
12631261
if (r)
1264-
goto unregister_composite_muxes;
1262+
goto unregister_muxes;
12651263

12661264
r = mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), top_clk_data);
12671265
if (r)
@@ -1279,8 +1277,6 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
12791277
mtk_clk_unregister_gates(top_clks, ARRAY_SIZE(top_clks), top_clk_data);
12801278
unregister_composite_divs:
12811279
mtk_clk_unregister_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), top_clk_data);
1282-
unregister_composite_muxes:
1283-
mtk_clk_unregister_composites(top_muxes, ARRAY_SIZE(top_muxes), top_clk_data);
12841280
unregister_muxes:
12851281
mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), top_clk_data);
12861282
unregister_factors:
@@ -1300,7 +1296,6 @@ static int clk_mt8195_topck_remove(struct platform_device *pdev)
13001296
of_clk_del_provider(node);
13011297
mtk_clk_unregister_gates(top_clks, ARRAY_SIZE(top_clks), top_clk_data);
13021298
mtk_clk_unregister_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), top_clk_data);
1303-
mtk_clk_unregister_composites(top_muxes, ARRAY_SIZE(top_muxes), top_clk_data);
13041299
mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), top_clk_data);
13051300
mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
13061301
mtk_clk_unregister_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), top_clk_data);

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