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Patryk Wlazlynlenb
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tools/power turbostat: Add fixed RAPL PSYS divisor for SPR
Intel Sapphire Rapids is an exception and has fixed divisor for RAPL PSYS counter set to 1.0. Add a platform bit and enable it for SPR. Reported-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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tools/power/x86/turbostat/turbostat.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -358,7 +358,7 @@ unsigned long long cpuidle_cur_sys_lpi_us;
358358
unsigned int tj_max;
359359
unsigned int tj_max_override;
360360
double rapl_power_units, rapl_time_units;
361-
double rapl_dram_energy_units, rapl_energy_units;
361+
double rapl_dram_energy_units, rapl_energy_units, rapl_psys_energy_units;
362362
double rapl_joule_counter_range;
363363
unsigned int crystal_hz;
364364
unsigned long long tsc_hz;
@@ -424,6 +424,7 @@ struct platform_features {
424424
bool has_per_core_rapl; /* Indicates cores energy collection is per-core, not per-package. AMD specific for now */
425425
bool has_rapl_divisor; /* Divisor for Energy unit raw value from MSR_RAPL_POWER_UNIT */
426426
bool has_fixed_rapl_unit; /* Fixed Energy Unit used for DRAM RAPL Domain */
427+
bool has_fixed_rapl_psys_unit; /* Fixed Energy Unit used for PSYS RAPL Domain */
427428
int rapl_quirk_tdp; /* Hardcoded TDP value when cannot be retrieved from hardware */
428429
int tcc_offset_bits; /* TCC Offset bits in MSR_IA32_TEMPERATURE_TARGET */
429430
bool enable_tsc_tweak; /* Use CPU Base freq instead of TSC freq for aperf/mperf counter */
@@ -824,6 +825,7 @@ static const struct platform_features spr_features = {
824825
.has_msr_core_c1_res = 1,
825826
.has_irtl_msrs = 1,
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.has_cst_prewake_bit = 1,
828+
.has_fixed_rapl_psys_unit = 1,
827829
.trl_msrs = TRL_BASE | TRL_CORECOUNT,
828830
.rapl_msrs = RAPL_PKG_ALL | RAPL_DRAM_ALL | RAPL_PSYS,
829831
};
@@ -1292,7 +1294,7 @@ static const struct rapl_counter_arch_info rapl_counter_arch_infos[] = {
12921294
.msr = MSR_PLATFORM_ENERGY_STATUS,
12931295
.msr_mask = 0x00000000FFFFFFFF,
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.msr_shift = 0,
1295-
.platform_rapl_msr_scale = &rapl_energy_units,
1297+
.platform_rapl_msr_scale = &rapl_psys_energy_units,
12961298
.rci_index = RAPL_RCI_INDEX_ENERGY_PLATFORM,
12971299
.bic = BIC_SysWatt | BIC_Sys_J,
12981300
.compat_scale = 1.0,
@@ -7112,6 +7114,11 @@ void rapl_probe_intel(void)
71127114
else
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rapl_dram_energy_units = rapl_energy_units;
71147116

7117+
if (platform->has_fixed_rapl_psys_unit)
7118+
rapl_psys_energy_units = 1.0;
7119+
else
7120+
rapl_psys_energy_units = rapl_energy_units;
7121+
71157122
time_unit = msr >> 16 & 0xF;
71167123
if (time_unit == 0)
71177124
time_unit = 0xA;

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