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tlebbebarino
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clk: eyeq: require clock index with phandle in all cases
We used to let compatibles with a single clock exposed to not have a cell. Switch away from that and enforce a cell in all cases. This is done at the same time as some compatibles (mobileye,eyeq6h-{central,west}-olb) go from one to more clocks exposed. Let's do the same switch and avoid future devicetree work if/when others follow. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20241106-mbly-clk-v2-4-84cfefb3f485@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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drivers/clk/clk-eyeq.c

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -367,11 +367,7 @@ static int eqc_probe(struct platform_device *pdev)
367367

368368
eqc_probe_init_divs(dev, data, base, cells);
369369

370-
/* When providing a single clock, require no cell. */
371-
if (clk_count == 1)
372-
return of_clk_add_hw_provider(np, of_clk_hw_simple_get, cells->hws[0]);
373-
else
374-
return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
370+
return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
375371
}
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377373
/* Required early for GIC timer (pll-cpu) and UARTs (pll-per). */
@@ -637,11 +633,7 @@ static void __init eqc_early_init(struct device_node *np,
637633
}
638634
}
639635

640-
/* When providing a single clock, require no cell. */
641-
if (clk_count == 1)
642-
ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, cells->hws[0]);
643-
else
644-
ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
636+
ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
645637
if (ret) {
646638
pr_err("failed registering clk provider: %d\n", ret);
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goto err;

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