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Merge branch 'net-iep-clock-module-fixes'
Meghana Malladi says: ==================== IEP clock module bug fixes This series has some bug fixes for IEP module needed by PPS and timesync operations. Patch 1/2 fixes firmware load sequence to run all the firmwares when either of the ethernet interfaces is up. Move all the code common for firmware bringup under common functions. Patch 2/2 fixes distorted PPS signal when the ethernet interfaces are brough down and up. This patch also fixes enabling PPS signal after bringing the interface up, without disabling PPS. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2 parents 3473020 + 9b11536 commit ce21419

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-121
lines changed

7 files changed

+244
-121
lines changed

drivers/net/ethernet/ti/icssg/icss_iep.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -215,6 +215,9 @@ static void icss_iep_enable_shadow_mode(struct icss_iep *iep)
215215
for (cmp = IEP_MIN_CMP; cmp < IEP_MAX_CMP; cmp++) {
216216
regmap_update_bits(iep->map, ICSS_IEP_CMP_STAT_REG,
217217
IEP_CMP_STATUS(cmp), IEP_CMP_STATUS(cmp));
218+
219+
regmap_update_bits(iep->map, ICSS_IEP_CMP_CFG_REG,
220+
IEP_CMP_CFG_CMP_EN(cmp), 0);
218221
}
219222

220223
/* enable reset counter on CMP0 event */
@@ -780,6 +783,11 @@ int icss_iep_exit(struct icss_iep *iep)
780783
}
781784
icss_iep_disable(iep);
782785

786+
if (iep->pps_enabled)
787+
icss_iep_pps_enable(iep, false);
788+
else if (iep->perout_enabled)
789+
icss_iep_perout_enable(iep, NULL, false);
790+
783791
return 0;
784792
}
785793
EXPORT_SYMBOL_GPL(icss_iep_exit);

drivers/net/ethernet/ti/icssg/icssg_common.c

Lines changed: 0 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -855,31 +855,6 @@ irqreturn_t prueth_rx_irq(int irq, void *dev_id)
855855
}
856856
EXPORT_SYMBOL_GPL(prueth_rx_irq);
857857

858-
void prueth_emac_stop(struct prueth_emac *emac)
859-
{
860-
struct prueth *prueth = emac->prueth;
861-
int slice;
862-
863-
switch (emac->port_id) {
864-
case PRUETH_PORT_MII0:
865-
slice = ICSS_SLICE0;
866-
break;
867-
case PRUETH_PORT_MII1:
868-
slice = ICSS_SLICE1;
869-
break;
870-
default:
871-
netdev_err(emac->ndev, "invalid port\n");
872-
return;
873-
}
874-
875-
emac->fw_running = 0;
876-
if (!emac->is_sr1)
877-
rproc_shutdown(prueth->txpru[slice]);
878-
rproc_shutdown(prueth->rtu[slice]);
879-
rproc_shutdown(prueth->pru[slice]);
880-
}
881-
EXPORT_SYMBOL_GPL(prueth_emac_stop);
882-
883858
void prueth_cleanup_tx_ts(struct prueth_emac *emac)
884859
{
885860
int i;

drivers/net/ethernet/ti/icssg/icssg_config.c

Lines changed: 28 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -397,7 +397,7 @@ static int prueth_emac_buffer_setup(struct prueth_emac *emac)
397397
return 0;
398398
}
399399

400-
static void icssg_init_emac_mode(struct prueth *prueth)
400+
void icssg_init_emac_mode(struct prueth *prueth)
401401
{
402402
/* When the device is configured as a bridge and it is being brought
403403
* back to the emac mode, the host mac address has to be set as 0.
@@ -406,9 +406,6 @@ static void icssg_init_emac_mode(struct prueth *prueth)
406406
int i;
407407
u8 mac[ETH_ALEN] = { 0 };
408408

409-
if (prueth->emacs_initialized)
410-
return;
411-
412409
/* Set VLAN TABLE address base */
413410
regmap_update_bits(prueth->miig_rt, FDB_GEN_CFG1, SMEM_VLAN_OFFSET_MASK,
414411
addr << SMEM_VLAN_OFFSET);
@@ -423,15 +420,13 @@ static void icssg_init_emac_mode(struct prueth *prueth)
423420
/* Clear host MAC address */
424421
icssg_class_set_host_mac_addr(prueth->miig_rt, mac);
425422
}
423+
EXPORT_SYMBOL_GPL(icssg_init_emac_mode);
426424

427-
static void icssg_init_fw_offload_mode(struct prueth *prueth)
425+
void icssg_init_fw_offload_mode(struct prueth *prueth)
428426
{
429427
u32 addr = prueth->shram.pa + EMAC_ICSSG_SWITCH_DEFAULT_VLAN_TABLE_OFFSET;
430428
int i;
431429

432-
if (prueth->emacs_initialized)
433-
return;
434-
435430
/* Set VLAN TABLE address base */
436431
regmap_update_bits(prueth->miig_rt, FDB_GEN_CFG1, SMEM_VLAN_OFFSET_MASK,
437432
addr << SMEM_VLAN_OFFSET);
@@ -448,18 +443,14 @@ static void icssg_init_fw_offload_mode(struct prueth *prueth)
448443
icssg_class_set_host_mac_addr(prueth->miig_rt, prueth->hw_bridge_dev->dev_addr);
449444
icssg_set_pvid(prueth, prueth->default_vlan, PRUETH_PORT_HOST);
450445
}
446+
EXPORT_SYMBOL_GPL(icssg_init_fw_offload_mode);
451447

452448
int icssg_config(struct prueth *prueth, struct prueth_emac *emac, int slice)
453449
{
454450
void __iomem *config = emac->dram.va + ICSSG_CONFIG_OFFSET;
455451
struct icssg_flow_cfg __iomem *flow_cfg;
456452
int ret;
457453

458-
if (prueth->is_switch_mode || prueth->is_hsr_offload_mode)
459-
icssg_init_fw_offload_mode(prueth);
460-
else
461-
icssg_init_emac_mode(prueth);
462-
463454
memset_io(config, 0, TAS_GATE_MASK_LIST0);
464455
icssg_miig_queues_init(prueth, slice);
465456

@@ -786,3 +777,27 @@ void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port)
786777
writel(pvid, prueth->shram.va + EMAC_ICSSG_SWITCH_PORT0_DEFAULT_VLAN_OFFSET);
787778
}
788779
EXPORT_SYMBOL_GPL(icssg_set_pvid);
780+
781+
int emac_fdb_flow_id_updated(struct prueth_emac *emac)
782+
{
783+
struct mgmt_cmd_rsp fdb_cmd_rsp = { 0 };
784+
int slice = prueth_emac_slice(emac);
785+
struct mgmt_cmd fdb_cmd = { 0 };
786+
int ret;
787+
788+
fdb_cmd.header = ICSSG_FW_MGMT_CMD_HEADER;
789+
fdb_cmd.type = ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW;
790+
fdb_cmd.seqnum = ++(emac->prueth->icssg_hwcmdseq);
791+
fdb_cmd.param = 0;
792+
793+
fdb_cmd.param |= (slice << 4);
794+
fdb_cmd.cmd_args[0] = 0;
795+
796+
ret = icssg_send_fdb_msg(emac, &fdb_cmd, &fdb_cmd_rsp);
797+
if (ret)
798+
return ret;
799+
800+
WARN_ON(fdb_cmd.seqnum != fdb_cmd_rsp.seqnum);
801+
return fdb_cmd_rsp.status == 1 ? 0 : -EINVAL;
802+
}
803+
EXPORT_SYMBOL_GPL(emac_fdb_flow_id_updated);

drivers/net/ethernet/ti/icssg/icssg_config.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@ struct icssg_rxq_ctx {
5555
#define ICSSG_FW_MGMT_FDB_CMD_TYPE 0x03
5656
#define ICSSG_FW_MGMT_CMD_TYPE 0x04
5757
#define ICSSG_FW_MGMT_PKT 0x80000000
58+
#define ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW 0x05
5859

5960
struct icssg_r30_cmd {
6061
u32 cmd[4];

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