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Shenwei WangShawn Guo
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arm64: dts: imx8-ss-dma: assign default clock rate for lpuarts
Add the assigned-clocks and assigned-clock-rates properties for the LPUARTx nodes. Without these properties, the default clock rate used would be 0, which can cause the UART ports to fail when open. Fixes: 35f4e9d ("arm64: dts: imx8: split adma ss into dma and audio ss") Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi

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@@ -90,6 +90,8 @@ dma_subsys: bus@5a000000 {
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clocks = <&uart0_lpcg IMX_LPCG_CLK_4>,
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<&uart0_lpcg IMX_LPCG_CLK_0>;
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clock-names = "ipg", "baud";
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assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <80000000>;
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power-domains = <&pd IMX_SC_R_UART_0>;
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status = "disabled";
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};
@@ -100,6 +102,8 @@ dma_subsys: bus@5a000000 {
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clocks = <&uart1_lpcg IMX_LPCG_CLK_4>,
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<&uart1_lpcg IMX_LPCG_CLK_0>;
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clock-names = "ipg", "baud";
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assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <80000000>;
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power-domains = <&pd IMX_SC_R_UART_1>;
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status = "disabled";
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};
@@ -110,6 +114,8 @@ dma_subsys: bus@5a000000 {
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clocks = <&uart2_lpcg IMX_LPCG_CLK_4>,
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<&uart2_lpcg IMX_LPCG_CLK_0>;
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clock-names = "ipg", "baud";
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assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <80000000>;
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power-domains = <&pd IMX_SC_R_UART_2>;
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status = "disabled";
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};
@@ -120,6 +126,8 @@ dma_subsys: bus@5a000000 {
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clocks = <&uart3_lpcg IMX_LPCG_CLK_4>,
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<&uart3_lpcg IMX_LPCG_CLK_0>;
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clock-names = "ipg", "baud";
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assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <80000000>;
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power-domains = <&pd IMX_SC_R_UART_3>;
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status = "disabled";
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};

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