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Merge tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt
SoCFPGA DTS updates for v6.6 - Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet - Add initial support for Agilex5 * tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA dt-bindings: clock: add Intel Agilex5 clock manager dt-bindings: reset: add reset IDs for Agilex5 dt-bindings: intel: Add Intel Agilex5 compatible arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb" arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions arm64: dts: agilex/stratix10: Updated QSPI Flash layout for UBIFS arm64: dts: agilex/stratix10/n5x: fix dtbs_check for rstmgr arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node arm64: dts: socfpga: stratix10: fix dtbs_check warning for usbphy arm64: dts: socfpga: agilex/stratix10: fix dtbs_check warnings for sram Link: https://lore.kernel.org/r/20230819161418.931258-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents ecd2dc2 + 2d599bc commit c708140

17 files changed

+703
-42
lines changed

Documentation/devicetree/bindings/arm/intel,socfpga.yaml

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@@ -21,6 +21,11 @@ properties:
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- intel,socfpga-agilex-n6000
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- intel,socfpga-agilex-socdk
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- const: intel,socfpga-agilex
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- description: Agilex5 boards
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items:
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- enum:
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- intel,socfpga-agilex5-socdk
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- const: intel,socfpga-agilex5
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additionalProperties: true
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/intel,agilex5-clkmgr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel SoCFPGA Agilex5 clock manager
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maintainers:
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- Dinh Nguyen <dinguyen@kernel.org>
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description:
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The Intel Agilex5 Clock Manager is an integrated clock controller, which
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generates and supplies clock to all the modules.
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properties:
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compatible:
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const: intel,agilex5-clkmgr
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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clkmgr: clock-controller@10d10000 {
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compatible = "intel,agilex5-clkmgr";
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reg = <0x10d10000 0x1000>;
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#clock-cells = <1>;
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};
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...

arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi

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@@ -440,7 +440,7 @@
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clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
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clock-names = "stmmaceth", "ptp_ref";
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resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
443-
reset-names = "stmmaceth", "stmmaceth-ocp";
443+
reset-names = "stmmaceth", "ahb";
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snps,axi-config = <&socfpga_axi_setup>;
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status = "disabled";
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};
@@ -460,7 +460,7 @@
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clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
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clock-names = "stmmaceth", "ptp_ref";
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resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
463-
reset-names = "stmmaceth", "stmmaceth-ocp";
463+
reset-names = "stmmaceth", "ahb";
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snps,axi-config = <&socfpga_axi_setup>;
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status = "disabled";
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};
@@ -480,7 +480,7 @@
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clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
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clock-names = "stmmaceth", "ptp_ref";
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resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
483-
reset-names = "stmmaceth", "stmmaceth-ocp";
483+
reset-names = "stmmaceth", "ahb";
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snps,axi-config = <&socfpga_axi_setup>;
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status = "disabled";
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};

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

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@@ -153,7 +153,7 @@
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];
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resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
156-
reset-names = "stmmaceth", "stmmaceth-ocp";
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reset-names = "stmmaceth", "ahb";
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clocks = <&clkmgr STRATIX10_EMAC0_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;
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clock-names = "stmmaceth", "ptp_ref";
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tx-fifo-depth = <16384>;
@@ -171,7 +171,7 @@
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];
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resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
174-
reset-names = "stmmaceth", "stmmaceth-ocp";
174+
reset-names = "stmmaceth", "ahb";
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clocks = <&clkmgr STRATIX10_EMAC1_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;
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clock-names = "stmmaceth", "ptp_ref";
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tx-fifo-depth = <16384>;
@@ -189,7 +189,7 @@
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];
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resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
192-
reset-names = "stmmaceth", "stmmaceth-ocp";
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reset-names = "stmmaceth", "ahb";
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clocks = <&clkmgr STRATIX10_EMAC2_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;
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clock-names = "stmmaceth", "ptp_ref";
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tx-fifo-depth = <16384>;
@@ -331,6 +331,9 @@
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ocram: sram@ffe00000 {
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compatible = "mmio-sram";
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reg = <0xffe00000 0x100000>;
334+
#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xffe00000 0x100000>;
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};
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pdma: dma-controller@ffda0000 {
@@ -484,12 +487,6 @@
484487
status = "disabled";
485488
};
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487-
usbphy0: usbphy@0 {
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#phy-cells = <0>;
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compatible = "usb-nop-xceiv";
490-
status = "okay";
491-
};
492-
493490
usb0: usb@ffb00000 {
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compatible = "snps,dwc2";
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reg = <0xffb00000 0x40000>;
@@ -636,4 +633,9 @@
636633
};
637634
};
638635
};
636+
637+
usbphy0: usbphy0 {
638+
compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
640+
};
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};

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

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@@ -38,10 +38,10 @@
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};
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};
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41-
memory {
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memory@80000000 {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
44-
reg = <0 0 0 0>;
44+
reg = <0 0x80000000 0 0>;
4545
};
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ref_033v: regulator-v-ref {
@@ -202,12 +202,12 @@
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203203
qspi_boot: partition@0 {
204204
label = "Boot and fpga data";
205-
reg = <0x0 0x03FE0000>;
205+
reg = <0x0 0x04200000>;
206206
};
207207

208-
qspi_rootfs: partition@3FE0000 {
209-
label = "Root Filesystem - JFFS2";
210-
reg = <0x03FE0000 0x0C020000>;
208+
root: partition@4200000 {
209+
label = "Root Filesystem - UBIFS";
210+
reg = <0x04200000 0x0BE00000>;
211211
};
212212
};
213213
};

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts

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};
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};
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41-
memory {
41+
memory@80000000 {
4242
device_type = "memory";
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/* We expect the bootloader to fill in the reg */
44-
reg = <0 0 0 0>;
44+
reg = <0 0x80000000 0 0>;
4545
};
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4747
ref_033v: regulator-v-ref {
@@ -103,9 +103,9 @@
103103
status = "okay";
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105105
flash@0 {
106+
reg = <0>;
106107
#address-cells = <1>;
107108
#size-cells = <1>;
108-
reg = <0>;
109109
nand-bus-width = <16>;
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111111
partition@0 {
@@ -194,7 +194,7 @@
194194
reg = <0x0 0x03FE0000>;
195195
};
196196

197-
qspi_rootfs: partition@3FE0000 {
197+
qspi_rootfs: partition@3fe0000 {
198198
label = "Root Filesystem - JFFS2";
199199
reg = <0x03FE0000 0x0C020000>;
200200
};

arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts

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2929
linux,initrd-end = <0x125c8324>;
3030
};
3131

32-
memory {
32+
memory@80000000 {
3333
device_type = "memory";
3434
reg = <0x0 0x0 0x0 0x80000000>;
3535
};

arch/arm64/boot/dts/intel/Makefile

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dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
33
socfpga_agilex_socdk.dtb \
44
socfpga_agilex_socdk_nand.dtb \
5+
socfpga_agilex5_socdk.dtb \
56
socfpga_n5x_socdk.dtb
67
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb

arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

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@@ -158,7 +158,7 @@
158158
interrupt-names = "macirq";
159159
mac-address = [00 00 00 00 00 00];
160160
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
161-
reset-names = "stmmaceth", "stmmaceth-ocp";
161+
reset-names = "stmmaceth", "ahb";
162162
tx-fifo-depth = <16384>;
163163
rx-fifo-depth = <16384>;
164164
snps,multicast-filter-bins = <256>;
@@ -176,7 +176,7 @@
176176
interrupt-names = "macirq";
177177
mac-address = [00 00 00 00 00 00];
178178
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
179-
reset-names = "stmmaceth", "stmmaceth-ocp";
179+
reset-names = "stmmaceth", "ahb";
180180
tx-fifo-depth = <16384>;
181181
rx-fifo-depth = <16384>;
182182
snps,multicast-filter-bins = <256>;
@@ -194,7 +194,7 @@
194194
interrupt-names = "macirq";
195195
mac-address = [00 00 00 00 00 00];
196196
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
197-
reset-names = "stmmaceth", "stmmaceth-ocp";
197+
reset-names = "stmmaceth", "ahb";
198198
tx-fifo-depth = <16384>;
199199
rx-fifo-depth = <16384>;
200200
snps,multicast-filter-bins = <256>;
@@ -336,6 +336,9 @@
336336
ocram: sram@ffe00000 {
337337
compatible = "mmio-sram";
338338
reg = <0xffe00000 0x40000>;
339+
#address-cells = <1>;
340+
#size-cells = <1>;
341+
ranges = <0 0xffe00000 0x40000>;
339342
};
340343

341344
pdma: dma-controller@ffda0000 {
@@ -373,9 +376,9 @@
373376
};
374377

375378
rst: rstmgr@ffd11000 {
376-
#reset-cells = <1>;
377-
compatible = "altr,stratix10-rst-mgr";
379+
compatible = "altr,stratix10-rst-mgr", "altr,rst-mgr";
378380
reg = <0xffd11000 0x100>;
381+
#reset-cells = <1>;
379382
};
380383

381384
smmu: iommu@fa000000 {

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