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ckborahrodrigovivi
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drm/i915/audio: Fix audio time stamp programming for DP
Intel hardware is capable of programming the Maud/Naud SDPs on its own based on real-time clocks. While doing so, it takes care of any deviations from the theoretical values. Programming the registers explicitly with static values can interfere with this logic. Therefore, let the HW decide the Maud and Naud SDPs on it's own. Cc: stable@vger.kernel.org # v5.17 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8097 Co-developed-by: Kai Vehmanen <kai.vehmanen@intel.com> Signed-off-by: Kai Vehmanen <kai.vehmanen@intel.com> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240430091825.733499-1-chaitanya.kumar.borah@intel.com (cherry picked from commit 8e056b5) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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drivers/gpu/drm/i915/display/intel_audio.c

Lines changed: 8 additions & 105 deletions
Original file line numberDiff line numberDiff line change
@@ -76,80 +76,13 @@ struct intel_audio_funcs {
7676
struct intel_crtc_state *crtc_state);
7777
};
7878

79-
/* DP N/M table */
80-
#define LC_810M 810000
81-
#define LC_540M 540000
82-
#define LC_270M 270000
83-
#define LC_162M 162000
84-
85-
struct dp_aud_n_m {
86-
int sample_rate;
87-
int clock;
88-
u16 m;
89-
u16 n;
90-
};
91-
9279
struct hdmi_aud_ncts {
9380
int sample_rate;
9481
int clock;
9582
int n;
9683
int cts;
9784
};
9885

99-
/* Values according to DP 1.4 Table 2-104 */
100-
static const struct dp_aud_n_m dp_aud_n_m[] = {
101-
{ 32000, LC_162M, 1024, 10125 },
102-
{ 44100, LC_162M, 784, 5625 },
103-
{ 48000, LC_162M, 512, 3375 },
104-
{ 64000, LC_162M, 2048, 10125 },
105-
{ 88200, LC_162M, 1568, 5625 },
106-
{ 96000, LC_162M, 1024, 3375 },
107-
{ 128000, LC_162M, 4096, 10125 },
108-
{ 176400, LC_162M, 3136, 5625 },
109-
{ 192000, LC_162M, 2048, 3375 },
110-
{ 32000, LC_270M, 1024, 16875 },
111-
{ 44100, LC_270M, 784, 9375 },
112-
{ 48000, LC_270M, 512, 5625 },
113-
{ 64000, LC_270M, 2048, 16875 },
114-
{ 88200, LC_270M, 1568, 9375 },
115-
{ 96000, LC_270M, 1024, 5625 },
116-
{ 128000, LC_270M, 4096, 16875 },
117-
{ 176400, LC_270M, 3136, 9375 },
118-
{ 192000, LC_270M, 2048, 5625 },
119-
{ 32000, LC_540M, 1024, 33750 },
120-
{ 44100, LC_540M, 784, 18750 },
121-
{ 48000, LC_540M, 512, 11250 },
122-
{ 64000, LC_540M, 2048, 33750 },
123-
{ 88200, LC_540M, 1568, 18750 },
124-
{ 96000, LC_540M, 1024, 11250 },
125-
{ 128000, LC_540M, 4096, 33750 },
126-
{ 176400, LC_540M, 3136, 18750 },
127-
{ 192000, LC_540M, 2048, 11250 },
128-
{ 32000, LC_810M, 1024, 50625 },
129-
{ 44100, LC_810M, 784, 28125 },
130-
{ 48000, LC_810M, 512, 16875 },
131-
{ 64000, LC_810M, 2048, 50625 },
132-
{ 88200, LC_810M, 1568, 28125 },
133-
{ 96000, LC_810M, 1024, 16875 },
134-
{ 128000, LC_810M, 4096, 50625 },
135-
{ 176400, LC_810M, 3136, 28125 },
136-
{ 192000, LC_810M, 2048, 16875 },
137-
};
138-
139-
static const struct dp_aud_n_m *
140-
audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate)
141-
{
142-
int i;
143-
144-
for (i = 0; i < ARRAY_SIZE(dp_aud_n_m); i++) {
145-
if (rate == dp_aud_n_m[i].sample_rate &&
146-
crtc_state->port_clock == dp_aud_n_m[i].clock)
147-
return &dp_aud_n_m[i];
148-
}
149-
150-
return NULL;
151-
}
152-
15386
static const struct {
15487
int clock;
15588
u32 config;
@@ -387,47 +320,17 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder,
387320
const struct intel_crtc_state *crtc_state)
388321
{
389322
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
390-
struct i915_audio_component *acomp = i915->display.audio.component;
391323
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
392-
enum port port = encoder->port;
393-
const struct dp_aud_n_m *nm;
394-
int rate;
395-
u32 tmp;
396-
397-
rate = acomp ? acomp->aud_sample_rate[port] : 0;
398-
nm = audio_config_dp_get_n_m(crtc_state, rate);
399-
if (nm)
400-
drm_dbg_kms(&i915->drm, "using Maud %u, Naud %u\n", nm->m,
401-
nm->n);
402-
else
403-
drm_dbg_kms(&i915->drm, "using automatic Maud, Naud\n");
404-
405-
tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder));
406-
tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
407-
tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
408-
tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
409-
tmp |= AUD_CONFIG_N_VALUE_INDEX;
410324

411-
if (nm) {
412-
tmp &= ~AUD_CONFIG_N_MASK;
413-
tmp |= AUD_CONFIG_N(nm->n);
414-
tmp |= AUD_CONFIG_N_PROG_ENABLE;
415-
}
416-
417-
intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp);
418-
419-
tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder));
420-
tmp &= ~AUD_CONFIG_M_MASK;
421-
tmp &= ~AUD_M_CTS_M_VALUE_INDEX;
422-
tmp &= ~AUD_M_CTS_M_PROG_ENABLE;
423-
424-
if (nm) {
425-
tmp |= nm->m;
426-
tmp |= AUD_M_CTS_M_VALUE_INDEX;
427-
tmp |= AUD_M_CTS_M_PROG_ENABLE;
428-
}
325+
/* Enable time stamps. Let HW calculate Maud/Naud values */
326+
intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder),
327+
AUD_CONFIG_N_VALUE_INDEX |
328+
AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK |
329+
AUD_CONFIG_UPPER_N_MASK |
330+
AUD_CONFIG_LOWER_N_MASK |
331+
AUD_CONFIG_N_PROG_ENABLE,
332+
AUD_CONFIG_N_VALUE_INDEX);
429333

430-
intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp);
431334
}
432335

433336
static void

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