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konradybciorobclark
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drm/msm/a6xx: Move LLC accessors to the common header
Move these wrappers in preparation for use in a6xx_gmu.c Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/551824/ Signed-off-by: Rob Clark <robdclark@chromium.org>
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drivers/gpu/drm/msm/adreno/a6xx_gpu.c

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@@ -1735,21 +1735,6 @@ static irqreturn_t a6xx_irq(struct msm_gpu *gpu)
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return IRQ_HANDLED;
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}
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static void a6xx_llc_rmw(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 mask, u32 or)
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{
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return msm_rmw(a6xx_gpu->llc_mmio + (reg << 2), mask, or);
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}
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static u32 a6xx_llc_read(struct a6xx_gpu *a6xx_gpu, u32 reg)
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{
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return msm_readl(a6xx_gpu->llc_mmio + (reg << 2));
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}
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static void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value)
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{
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msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2));
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}
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static void a6xx_llc_deactivate(struct a6xx_gpu *a6xx_gpu)
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{
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llcc_slice_deactivate(a6xx_gpu->llc_slice);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

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@@ -62,6 +62,21 @@ static inline bool a6xx_has_gbif(struct adreno_gpu *gpu)
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return true;
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}
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static inline void a6xx_llc_rmw(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 mask, u32 or)
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{
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return msm_rmw(a6xx_gpu->llc_mmio + (reg << 2), mask, or);
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}
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static inline u32 a6xx_llc_read(struct a6xx_gpu *a6xx_gpu, u32 reg)
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{
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return msm_readl(a6xx_gpu->llc_mmio + (reg << 2));
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}
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static inline void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value)
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{
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msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2));
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}
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#define shadowptr(_a6xx_gpu, _ring) ((_a6xx_gpu)->shadow_iova + \
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((_ring)->id * sizeof(uint32_t)))
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