perf vendor events arm64: AmpereOne/AmpereOneX: Mark LD_RETIRED impacted by errata

ilkka-koskinen · namhyung · commit c0b60ce4615a · 2025-03-20T22:58:57.000-07:00
Atomic instructions are both memory-reading and memory-writing instructions and so should be counted by both LD_RETIRED and ST_RETIRED performance monitoring events. However LD_RETIRED does not count atomic instructions. Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Reviewed-by: James Clark <james.clark@linaro.org> Link: https://lore.kernel.org/r/20250313201559.11332-2-ilkka@os.amperecomputing.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/memory.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/memory.json
@@ -1,6 +1,8 @@
 [
     {
-        "ArchStdEvent": "LD_RETIRED"
+        "ArchStdEvent": "LD_RETIRED",
+        "Errata": "Errata AC03_CPU_52",
+        "BriefDescription": "Instruction architecturally executed, condition code check pass, load. Impacted by errata -"
     },
     {
         "ArchStdEvent": "MEM_ACCESS_RD"
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/memory.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/memory.json
@@ -1,6 +1,8 @@
 [
     {
-        "ArchStdEvent": "LD_RETIRED"
+        "ArchStdEvent": "LD_RETIRED",
+        "Errata": "Errata AC04_CPU_21",
+        "BriefDescription": "Instruction architecturally executed, condition code check pass, load. Impacted by errata -"
     },
     {
         "ArchStdEvent": "MEM_ACCESS_RD"

Original file line number	Diff line number	Diff line change
`@@ -1,6 +1,8 @@`
`1`	`1`	`[`
`2`	`2`	`{`
`3`		`- "ArchStdEvent": "LD_RETIRED"`
	`3`	`+ "ArchStdEvent": "LD_RETIRED",`
	`4`	`+ "Errata": "Errata AC03_CPU_52",`
	`5`	`+ "BriefDescription": "Instruction architecturally executed, condition code check pass, load. Impacted by errata -"`
`4`	`6`	`},`
`5`	`7`	`{`
`6`	`8`	`"ArchStdEvent": "MEM_ACCESS_RD"`