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375 | 375 | bias-pull-up;
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376 | 376 | };
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377 | 377 | };
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| 378 | + |
| 379 | + |
| 380 | + ltdc_pins_a: ltdc-0 { |
| 381 | + pins { |
| 382 | + pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */ |
| 383 | + <STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */ |
| 384 | + <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ |
| 385 | + <STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */ |
| 386 | + <STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */ |
| 387 | + <STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */ |
| 388 | + <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ |
| 389 | + <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ |
| 390 | + <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ |
| 391 | + <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ |
| 392 | + <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ |
| 393 | + <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ |
| 394 | + <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ |
| 395 | + <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ |
| 396 | + <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ |
| 397 | + <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ |
| 398 | + <STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */ |
| 399 | + <STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */ |
| 400 | + <STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */ |
| 401 | + <STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */ |
| 402 | + <STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */ |
| 403 | + <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ |
| 404 | + <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ |
| 405 | + <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ |
| 406 | + <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ |
| 407 | + <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ |
| 408 | + <STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */ |
| 409 | + <STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */ |
| 410 | + slew-rate = <2>; |
| 411 | + }; |
| 412 | + }; |
378 | 413 | };
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379 | 414 | };
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380 | 415 | };
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