@@ -316,8 +316,8 @@ mpt_is_discovery_complete(MPT_ADAPTER *ioc)
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rc = 1 ;
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out_free_consistent :
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- pci_free_consistent ( ioc -> pcidev , hdr .ExtPageLength * 4 ,
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- buffer , dma_handle );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , hdr .ExtPageLength * 4 , buffer ,
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+ dma_handle );
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out :
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return rc ;
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}
@@ -1661,16 +1661,14 @@ mpt_mapresources(MPT_ADAPTER *ioc)
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const uint64_t required_mask = dma_get_required_mask
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(& pdev -> dev );
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if (required_mask > DMA_BIT_MASK (32 )
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- && !pci_set_dma_mask (pdev , DMA_BIT_MASK (64 ))
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- && !pci_set_consistent_dma_mask (pdev ,
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- DMA_BIT_MASK (64 ))) {
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+ && !dma_set_mask (& pdev -> dev , DMA_BIT_MASK (64 ))
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+ && !dma_set_coherent_mask (& pdev -> dev , DMA_BIT_MASK (64 ))) {
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ioc -> dma_mask = DMA_BIT_MASK (64 );
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dinitprintk (ioc , printk (MYIOC_s_INFO_FMT
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": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n" ,
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ioc -> name ));
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- } else if (!pci_set_dma_mask (pdev , DMA_BIT_MASK (32 ))
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- && !pci_set_consistent_dma_mask (pdev ,
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- DMA_BIT_MASK (32 ))) {
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+ } else if (!dma_set_mask (& pdev -> dev , DMA_BIT_MASK (32 ))
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+ && !dma_set_coherent_mask (& pdev -> dev , DMA_BIT_MASK (32 ))) {
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ioc -> dma_mask = DMA_BIT_MASK (32 );
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dinitprintk (ioc , printk (MYIOC_s_INFO_FMT
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": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n" ,
@@ -1681,9 +1679,8 @@ mpt_mapresources(MPT_ADAPTER *ioc)
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goto out_pci_release_region ;
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}
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} else {
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- if (!pci_set_dma_mask (pdev , DMA_BIT_MASK (32 ))
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- && !pci_set_consistent_dma_mask (pdev ,
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- DMA_BIT_MASK (32 ))) {
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+ if (!dma_set_mask (& pdev -> dev , DMA_BIT_MASK (32 ))
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+ && !dma_set_coherent_mask (& pdev -> dev , DMA_BIT_MASK (32 ))) {
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ioc -> dma_mask = DMA_BIT_MASK (32 );
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dinitprintk (ioc , printk (MYIOC_s_INFO_FMT
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": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n" ,
@@ -2769,9 +2766,9 @@ mpt_adapter_disable(MPT_ADAPTER *ioc)
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if (ioc -> spi_data .pIocPg4 != NULL ) {
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sz = ioc -> spi_data .IocPg4Sz ;
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- pci_free_consistent ( ioc -> pcidev , sz ,
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- ioc -> spi_data .pIocPg4 ,
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- ioc -> spi_data .IocPg4_dma );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , sz ,
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+ ioc -> spi_data .pIocPg4 ,
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+ ioc -> spi_data .IocPg4_dma );
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ioc -> spi_data .pIocPg4 = NULL ;
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ioc -> alloc_total -= sz ;
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}
@@ -3548,7 +3545,8 @@ mpt_free_fw_memory(MPT_ADAPTER *ioc)
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sz = ioc -> facts .FWImageSize ;
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dinitprintk (ioc , printk (MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n" ,
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ioc -> name , ioc -> cached_fw , (void * )(ulong )ioc -> cached_fw_dma , sz , sz ));
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- pci_free_consistent (ioc -> pcidev , sz , ioc -> cached_fw , ioc -> cached_fw_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev , sz , ioc -> cached_fw ,
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+ ioc -> cached_fw_dma );
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ioc -> alloc_total -= sz ;
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ioc -> cached_fw = NULL ;
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}
@@ -4447,20 +4445,19 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
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*/
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if (ioc -> pcidev -> device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
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ioc -> dma_mask > DMA_BIT_MASK (35 )) {
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- if (!pci_set_dma_mask (ioc -> pcidev , DMA_BIT_MASK (32 ))
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- && !pci_set_consistent_dma_mask (ioc -> pcidev ,
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- DMA_BIT_MASK (32 ))) {
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+ if (!dma_set_mask (& ioc -> pcidev -> dev , DMA_BIT_MASK (32 ))
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+ && !dma_set_coherent_mask (& ioc -> pcidev -> dev , DMA_BIT_MASK (32 ))) {
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dma_mask = DMA_BIT_MASK (35 );
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d36memprintk (ioc , printk (MYIOC_s_DEBUG_FMT
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"setting 35 bit addressing for "
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"Request/Reply/Chain and Sense Buffers\n" ,
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ioc -> name ));
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} else {
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/*Reseting DMA mask to 64 bit*/
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- pci_set_dma_mask ( ioc -> pcidev ,
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- DMA_BIT_MASK (64 ));
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- pci_set_consistent_dma_mask ( ioc -> pcidev ,
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- DMA_BIT_MASK (64 ));
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+ dma_set_mask ( & ioc -> pcidev -> dev ,
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+ DMA_BIT_MASK (64 ));
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+ dma_set_coherent_mask ( & ioc -> pcidev -> dev ,
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+ DMA_BIT_MASK (64 ));
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printk (MYIOC_s_ERR_FMT
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"failed setting 35 bit addressing for "
@@ -4595,8 +4592,8 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
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alloc_dma += ioc -> reply_sz ;
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}
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- if (dma_mask == DMA_BIT_MASK (35 ) && !pci_set_dma_mask ( ioc -> pcidev ,
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- ioc -> dma_mask ) && !pci_set_consistent_dma_mask ( ioc -> pcidev ,
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+ if (dma_mask == DMA_BIT_MASK (35 ) && !dma_set_mask ( & ioc -> pcidev -> dev ,
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+ ioc -> dma_mask ) && !dma_set_coherent_mask ( & ioc -> pcidev -> dev ,
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ioc -> dma_mask ))
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d36memprintk (ioc , printk (MYIOC_s_DEBUG_FMT
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"restoring 64 bit addressing\n" , ioc -> name ));
@@ -4620,8 +4617,8 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
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ioc -> sense_buf_pool = NULL ;
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}
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- if (dma_mask == DMA_BIT_MASK (35 ) && !pci_set_dma_mask ( ioc -> pcidev ,
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- DMA_BIT_MASK (64 )) && !pci_set_consistent_dma_mask ( ioc -> pcidev ,
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+ if (dma_mask == DMA_BIT_MASK (35 ) && !dma_set_mask ( & ioc -> pcidev -> dev ,
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+ DMA_BIT_MASK (64 )) && !dma_set_coherent_mask ( & ioc -> pcidev -> dev ,
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DMA_BIT_MASK (64 )))
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d36memprintk (ioc , printk (MYIOC_s_DEBUG_FMT
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"restoring 64 bit addressing\n" , ioc -> name ));
@@ -4982,7 +4979,8 @@ GetLanConfigPages(MPT_ADAPTER *ioc)
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}
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- pci_free_consistent (ioc -> pcidev , data_sz , (u8 * ) ppage0_alloc , page0_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev , data_sz ,
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+ (u8 * )ppage0_alloc , page0_dma );
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/* FIXME!
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* Normalize endianness of structure data,
@@ -5026,7 +5024,8 @@ GetLanConfigPages(MPT_ADAPTER *ioc)
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memcpy (& ioc -> lan_cnfg_page1 , ppage1_alloc , copy_sz );
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}
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- pci_free_consistent (ioc -> pcidev , data_sz , (u8 * ) ppage1_alloc , page1_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev , data_sz ,
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+ (u8 * )ppage1_alloc , page1_dma );
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/* FIXME!
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* Normalize endianness of structure data,
@@ -5325,7 +5324,8 @@ GetIoUnitPage2(MPT_ADAPTER *ioc)
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if ((rc = mpt_config (ioc , & cfg )) == 0 )
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ioc -> biosVersion = le32_to_cpu (ppage_alloc -> BiosVersion );
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- pci_free_consistent (ioc -> pcidev , data_sz , (u8 * ) ppage_alloc , page_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev , data_sz ,
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+ (u8 * )ppage_alloc , page_dma );
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}
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return rc ;
@@ -5456,7 +5456,9 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
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}
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}
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if (pbuf ) {
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- pci_free_consistent (ioc -> pcidev , header .PageLength * 4 , pbuf , buf_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev ,
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+ header .PageLength * 4 , pbuf ,
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+ buf_dma );
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}
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}
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}
@@ -5543,7 +5545,9 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
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}
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}
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- pci_free_consistent (ioc -> pcidev , header .PageLength * 4 , pbuf , buf_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev ,
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+ header .PageLength * 4 , pbuf ,
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+ buf_dma );
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}
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}
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@@ -5707,8 +5711,8 @@ mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
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out :
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if (buffer )
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- pci_free_consistent ( ioc -> pcidev , hdr .PageLength * 4 , buffer ,
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- dma_handle );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , hdr .PageLength * 4 ,
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+ buffer , dma_handle );
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}
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/**
@@ -5776,8 +5780,8 @@ mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
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out :
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if (buffer )
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- pci_free_consistent ( ioc -> pcidev , hdr .PageLength * 4 , buffer ,
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- dma_handle );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , hdr .PageLength * 4 ,
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+ buffer , dma_handle );
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return rc ;
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}
@@ -5840,8 +5844,8 @@ mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
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out :
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if (buffer )
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- pci_free_consistent ( ioc -> pcidev , hdr .PageLength * 4 , buffer ,
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- dma_handle );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , hdr .PageLength * 4 ,
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+ buffer , dma_handle );
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return rc ;
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}
@@ -5929,8 +5933,8 @@ mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
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out :
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if (buffer )
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- pci_free_consistent ( ioc -> pcidev , hdr .PageLength * 4 , buffer ,
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- dma_handle );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , hdr .PageLength * 4 ,
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+ buffer , dma_handle );
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return rc ;
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}
@@ -6011,7 +6015,7 @@ mpt_findImVolumes(MPT_ADAPTER *ioc)
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pIoc2 -> RaidVolume [i ].VolumeID );
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out :
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- pci_free_consistent ( ioc -> pcidev , iocpage2sz , pIoc2 , ioc2_dma );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , iocpage2sz , pIoc2 , ioc2_dma );
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return rc ;
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}
@@ -6070,7 +6074,7 @@ mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
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}
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}
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- pci_free_consistent ( ioc -> pcidev , iocpage3sz , pIoc3 , ioc3_dma );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , iocpage3sz , pIoc3 , ioc3_dma );
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return 0 ;
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}
@@ -6122,7 +6126,8 @@ mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
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ioc -> spi_data .IocPg4_dma = ioc4_dma ;
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ioc -> spi_data .IocPg4Sz = iocpage4sz ;
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} else {
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- pci_free_consistent (ioc -> pcidev , iocpage4sz , pIoc4 , ioc4_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev , iocpage4sz , pIoc4 ,
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+ ioc4_dma );
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ioc -> spi_data .pIocPg4 = NULL ;
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ioc -> alloc_total -= iocpage4sz ;
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}
@@ -6210,7 +6215,7 @@ mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
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}
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}
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- pci_free_consistent ( ioc -> pcidev , iocpage1sz , pIoc1 , ioc1_dma );
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+ dma_free_coherent ( & ioc -> pcidev -> dev , iocpage1sz , pIoc1 , ioc1_dma );
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return ;
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}
@@ -6255,7 +6260,8 @@ mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
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out :
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if (pbuf )
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- pci_free_consistent (ioc -> pcidev , hdr .PageLength * 4 , pbuf , buf_dma );
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+ dma_free_coherent (& ioc -> pcidev -> dev , hdr .PageLength * 4 , pbuf ,
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+ buf_dma );
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}
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/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
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