Skip to content

Commit ad3e33f

Browse files
committed
drm/panel: Move AUX B116XW03 out of panel-edp back to panel-simple
In commit 5f04e7c ("drm/panel-edp: Split eDP panels out of panel-simple") I moved a pile of panels out of panel-simple driver into the newly created panel-edp driver. One of those panels, however, shouldn't have been moved. As is clear from commit e35e305 ("drm/panel: simple: Add AUO B116XW03 panel support"), AUX B116XW03 is an LVDS panel. It's used in exynos5250-snow and exynos5420-peach-pit where it's clear that the panel is hooked up with LVDS. Furthermore, searching for datasheets I found one that makes it clear that this panel is LVDS. As far as I can tell, I got confused because in commit 88d3457 ("drm/panel: auo,b116xw03: fix flash backlight when power on") Jitao Shi added "DRM_MODE_CONNECTOR_eDP". That seems wrong. Looking at the downstream ChromeOS trees, it seems like some Mediatek boards are using a panel that they call "auo,b116xw03" that's an eDP panel. The best I can guess is that they actually have a different panel that has similar timing. If so then the proper panel should be used or they should switch to the generic "edp-panel" compatible. When moving this back to panel-edp, I wasn't sure what to use for .bus_flags and .bus_format and whether to add the extra "enable" delay from commit 88d3457 ("drm/panel: auo,b116xw03: fix flash backlight when power on"). I've added formats/flags/delays based on my (inexpert) analysis of the datasheet. These are untested. NOTE: if/when this is backported to stable, we might run into some trouble. Specifically, before 474c162 ("arm64: dts: mt8183: jacuzzi: Move panel under aux-bus") this panel was used by "mt8183-kukui-jacuzzi", which assumed it was an eDP panel. I don't know what to suggest for that other than someone making up a bogus panel for jacuzzi that's just for the stable channel. Fixes: 88d3457 ("drm/panel: auo,b116xw03: fix flash backlight when power on") Fixes: 5f04e7c ("drm/panel-edp: Split eDP panels out of panel-simple") Tested-by: Anton Bambura <jenneron@postmarketos.org> Acked-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230925150010.1.Iff672233861bcc4cf25a7ad0a81308adc3bda8a4@changeid
1 parent 7b821db commit ad3e33f

File tree

2 files changed

+35
-29
lines changed

2 files changed

+35
-29
lines changed

drivers/gpu/drm/panel/panel-edp.c

Lines changed: 0 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -976,32 +976,6 @@ static const struct panel_desc auo_b116xak01 = {
976976
},
977977
};
978978

979-
static const struct drm_display_mode auo_b116xw03_mode = {
980-
.clock = 70589,
981-
.hdisplay = 1366,
982-
.hsync_start = 1366 + 40,
983-
.hsync_end = 1366 + 40 + 40,
984-
.htotal = 1366 + 40 + 40 + 32,
985-
.vdisplay = 768,
986-
.vsync_start = 768 + 10,
987-
.vsync_end = 768 + 10 + 12,
988-
.vtotal = 768 + 10 + 12 + 6,
989-
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
990-
};
991-
992-
static const struct panel_desc auo_b116xw03 = {
993-
.modes = &auo_b116xw03_mode,
994-
.num_modes = 1,
995-
.bpc = 6,
996-
.size = {
997-
.width = 256,
998-
.height = 144,
999-
},
1000-
.delay = {
1001-
.enable = 400,
1002-
},
1003-
};
1004-
1005979
static const struct drm_display_mode auo_b133han05_mode = {
1006980
.clock = 142600,
1007981
.hdisplay = 1920,
@@ -1725,9 +1699,6 @@ static const struct of_device_id platform_of_match[] = {
17251699
}, {
17261700
.compatible = "auo,b116xa01",
17271701
.data = &auo_b116xak01,
1728-
}, {
1729-
.compatible = "auo,b116xw03",
1730-
.data = &auo_b116xw03,
17311702
}, {
17321703
.compatible = "auo,b133han05",
17331704
.data = &auo_b133han05,

drivers/gpu/drm/panel/panel-simple.c

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -919,6 +919,38 @@ static const struct panel_desc auo_b101xtn01 = {
919919
},
920920
};
921921

922+
static const struct drm_display_mode auo_b116xw03_mode = {
923+
.clock = 70589,
924+
.hdisplay = 1366,
925+
.hsync_start = 1366 + 40,
926+
.hsync_end = 1366 + 40 + 40,
927+
.htotal = 1366 + 40 + 40 + 32,
928+
.vdisplay = 768,
929+
.vsync_start = 768 + 10,
930+
.vsync_end = 768 + 10 + 12,
931+
.vtotal = 768 + 10 + 12 + 6,
932+
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
933+
};
934+
935+
static const struct panel_desc auo_b116xw03 = {
936+
.modes = &auo_b116xw03_mode,
937+
.num_modes = 1,
938+
.bpc = 6,
939+
.size = {
940+
.width = 256,
941+
.height = 144,
942+
},
943+
.delay = {
944+
.prepare = 1,
945+
.enable = 200,
946+
.disable = 200,
947+
.unprepare = 500,
948+
},
949+
.bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
950+
.bus_flags = DRM_BUS_FLAG_DE_HIGH,
951+
.connector_type = DRM_MODE_CONNECTOR_LVDS,
952+
};
953+
922954
static const struct display_timing auo_g070vvn01_timings = {
923955
.pixelclock = { 33300000, 34209000, 45000000 },
924956
.hactive = { 800, 800, 800 },
@@ -4102,6 +4134,9 @@ static const struct of_device_id platform_of_match[] = {
41024134
}, {
41034135
.compatible = "auo,b101xtn01",
41044136
.data = &auo_b101xtn01,
4137+
}, {
4138+
.compatible = "auo,b116xw03",
4139+
.data = &auo_b116xw03,
41054140
}, {
41064141
.compatible = "auo,g070vvn01",
41074142
.data = &auo_g070vvn01,

0 commit comments

Comments
 (0)