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Merge tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt subsystem updates from Thomas Gleixner: "Core: - Provide a new mechanism to create interrupt domains. The existing interfaces have already too many parameters and it's a pain to expand any of this for new required functionality. The new function takes a pointer to a data structure as argument. The data structure combines all existing parameters and allows for easy extension. The first extension for this is to handle the instantiation of generic interrupt chips at the core level and to allow drivers to provide extra init/exit callbacks. This is necessary to do the full interrupt chip initialization before the new domain is published, so that concurrent usage sites won't see a half initialized interrupt domain. Similar problems exist on teardown. This has turned out to be a real problem due to the deferred and parallel probing which was added in recent years. Handling this at the core level allows to remove quite some accrued boilerplate code in existing drivers and avoids horrible workarounds at the driver level. - The usual small improvements all over the place Drivers: - Add support for LAN966x OIC and RZ/Five SoC - Split the STM ExtI driver into a microcontroller and a SMP version to allow building the latter as a module for multi-platform kernels - Enable MSI support for Armada 370XP on platforms which do not support IPIs - The usual small fixes and enhancements all over the place" * tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits) irqdomain: Fix the kernel-doc and plug it into Documentation genirq: Set IRQF_COND_ONESHOT in request_irq() irqchip/imx-irqsteer: Handle runtime power management correctly irqchip/gic-v3: Pass #redistributor-regions to gic_of_setup_kvm_info() irqchip/bcm2835: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND irqchip/gic-v4: Make sure a VPE is locked when VMAPP is issued irqchip/gic-v4: Substitute vmovp_lock for a per-VM lock irqchip/gic-v4: Always configure affinity on VPE activation Revert "irqchip/dw-apb-ictl: Support building as module" Revert "Loongarch: Support loongarch avec" arm64: Kconfig: Allow build irq-stm32mp-exti driver as module ARM: stm32: Allow build irq-stm32mp-exti driver as module irqchip/stm32mp-exti: Allow building as module irqchip/stm32mp-exti: Rename internal symbols irqchip/stm32-exti: Split MCU and MPU code arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms ARM: stm32: Use different EXTI driver on ARMv7m and ARMv7a irqchip/stm32-exti: Add CONFIG_STM32MP_EXTI irqchip/dw-apb-ictl: Support building as module irqchip/riscv-aplic: Simplify the initialization code ...
2 parents a362ade + b7b3773 commit ac7473a

35 files changed

+1965
-900
lines changed

Documentation/core-api/genericirq.rst

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@@ -410,6 +410,8 @@ which are used in the generic IRQ layer.
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.. kernel-doc:: include/linux/interrupt.h
411411
:internal:
412412

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.. kernel-doc:: include/linux/irqdomain.h
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413415
Public Functions Provided
414416
=========================
415417

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@@ -0,0 +1,55 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/microchip,lan966x-oic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip LAN966x outband interrupt controller
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9+
maintainers:
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- Herve Codina <herve.codina@bootlin.com>
11+
12+
allOf:
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- $ref: /schemas/interrupt-controller.yaml#
14+
15+
description: |
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The Microchip LAN966x outband interrupt controller (OIC) maps the internal
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interrupt sources of the LAN966x device to an external interrupt.
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When the LAN966x device is used as a PCI device, the external interrupt is
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routed to the PCI interrupt.
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properties:
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compatible:
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const: microchip,lan966x-oic
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'#interrupt-cells':
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const: 2
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interrupt-controller: true
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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required:
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- compatible
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- '#interrupt-cells'
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- interrupt-controller
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- interrupts
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- reg
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additionalProperties: false
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examples:
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- |
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interrupt-controller@e00c0120 {
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compatible = "microchip,lan966x-oic";
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reg = <0xe00c0120 0x190>;
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupts = <0>;
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interrupt-parent = <&intc>;
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};
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...

Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml

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@@ -21,13 +21,16 @@ description: |
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a07g043u-irqc # RZ/G2UL
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- renesas,r9a07g044-irqc # RZ/G2{L,LC}
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- renesas,r9a07g054-irqc # RZ/V2L
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- renesas,r9a08g045-irqc # RZ/G3S
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- const: renesas,rzg2l-irqc
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oneOf:
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- items:
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- enum:
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- renesas,r9a07g043u-irqc # RZ/G2UL
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- renesas,r9a07g044-irqc # RZ/G2{L,LC}
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- renesas,r9a07g054-irqc # RZ/V2L
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- renesas,r9a08g045-irqc # RZ/G3S
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- const: renesas,rzg2l-irqc
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- const: renesas,r9a07g043f-irqc # RZ/Five
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'#interrupt-cells':
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description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the

MAINTAINERS

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@@ -14942,6 +14942,12 @@ L: netdev@vger.kernel.org
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S: Maintained
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F: drivers/net/ethernet/microchip/lan966x/*
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MICROCHIP LAN966X OIC DRIVER
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M: Herve Codina <herve.codina@bootlin.com>
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S: Maintained
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F: Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml
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F: drivers/irqchip/irq-lan966x-oic.c
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MICROCHIP LCDFB DRIVER
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M: Nicolas Ferre <nicolas.ferre@microchip.com>
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L: linux-fbdev@vger.kernel.org

arch/arm/mach-stm32/Kconfig

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@@ -11,7 +11,7 @@ menuconfig ARCH_STM32
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select CLKSRC_STM32
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select PINCTRL
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select RESET_CONTROLLER
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select STM32_EXTI
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select STM32_EXTI if ARM_SINGLE_ARMV7M
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select STM32_FIREWALL
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help
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Support for STMicroelectronics STM32 processors.

arch/arm64/Kconfig.platforms

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@@ -309,7 +309,6 @@ config ARCH_STM32
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select GPIOLIB
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select PINCTRL
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select PINCTRL_STM32MP257
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select STM32_EXTI
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select ARM_SMC_MBOX
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select ARM_SCMI_PROTOCOL
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select REGULATOR

arch/um/drivers/virt-pci.c

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@@ -988,6 +988,11 @@ static struct resource virt_platform_resource = {
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989989
static int __init um_pci_init(void)
990990
{
991+
struct irq_domain_info inner_domain_info = {
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.size = MAX_MSI_VECTORS,
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.hwirq_max = MAX_MSI_VECTORS,
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.ops = &um_pci_inner_domain_ops,
995+
};
991996
int err, i;
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WARN_ON(logic_iomem_add_region(&virt_cfgspace_resource,
@@ -1017,11 +1022,10 @@ static int __init um_pci_init(void)
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goto free;
10181023
}
10191024

1020-
um_pci_inner_domain = __irq_domain_add(um_pci_fwnode, MAX_MSI_VECTORS,
1021-
MAX_MSI_VECTORS, 0,
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&um_pci_inner_domain_ops, NULL);
1023-
if (!um_pci_inner_domain) {
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err = -ENOMEM;
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inner_domain_info.fwnode = um_pci_fwnode;
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um_pci_inner_domain = irq_domain_instantiate(&inner_domain_info);
1027+
if (IS_ERR(um_pci_inner_domain)) {
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err = PTR_ERR(um_pci_inner_domain);
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goto free;
10261030
}
10271031

@@ -1058,7 +1062,7 @@ static int __init um_pci_init(void)
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goto free;
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return 0;
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free:
1061-
if (um_pci_inner_domain)
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if (!IS_ERR_OR_NULL(um_pci_inner_domain))
10621066
irq_domain_remove(um_pci_inner_domain);
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if (um_pci_fwnode)
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irq_domain_free_fwnode(um_pci_fwnode);

drivers/acpi/processor_core.c

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@@ -216,6 +216,21 @@ phys_cpuid_t __init acpi_map_madt_entry(u32 acpi_id)
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return rv;
217217
}
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219+
int __init acpi_get_madt_revision(void)
220+
{
221+
struct acpi_table_header *madt = NULL;
222+
int revision;
223+
224+
if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_MADT, 0, &madt)))
225+
return -EINVAL;
226+
227+
revision = madt->revision;
228+
229+
acpi_put_table(madt);
230+
231+
return revision;
232+
}
233+
219234
static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id)
220235
{
221236
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };

drivers/irqchip/Kconfig

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@@ -169,6 +169,18 @@ config IXP4XX_IRQ
169169
select IRQ_DOMAIN
170170
select SPARSE_IRQ
171171

172+
config LAN966X_OIC
173+
tristate "Microchip LAN966x OIC Support"
174+
select GENERIC_IRQ_CHIP
175+
select IRQ_DOMAIN
176+
help
177+
Enable support for the LAN966x Outbound Interrupt Controller.
178+
This controller is present on the Microchip LAN966x PCI device and
179+
maps the internal interrupts sources to PCIe interrupt.
180+
181+
To compile this driver as a module, choose M here: the module
182+
will be called irq-lan966x-oic.
183+
172184
config MADERA_IRQ
173185
tristate
174186

@@ -392,6 +404,15 @@ config LS_SCFG_MSI
392404
config PARTITION_PERCPU
393405
bool
394406

407+
config STM32MP_EXTI
408+
tristate "STM32MP extended interrupts and event controller"
409+
depends on (ARCH_STM32 && !ARM_SINGLE_ARMV7M) || COMPILE_TEST
410+
default y
411+
select IRQ_DOMAIN_HIERARCHY
412+
select GENERIC_IRQ_CHIP
413+
help
414+
Support STM32MP EXTI (extended interrupts and event) controller.
415+
395416
config STM32_EXTI
396417
bool
397418
select IRQ_DOMAIN

drivers/irqchip/Makefile

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@@ -84,6 +84,7 @@ obj-$(CONFIG_MVEBU_SEI) += irq-mvebu-sei.o
8484
obj-$(CONFIG_LS_EXTIRQ) += irq-ls-extirq.o
8585
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
8686
obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o irq-aspeed-scu-ic.o
87+
obj-$(CONFIG_STM32MP_EXTI) += irq-stm32mp-exti.o
8788
obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
8889
obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
8990
obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
@@ -104,6 +105,7 @@ obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o
104105
obj-$(CONFIG_IMX_INTMUX) += irq-imx-intmux.o
105106
obj-$(CONFIG_IMX_MU_MSI) += irq-imx-mu-msi.o
106107
obj-$(CONFIG_MADERA_IRQ) += irq-madera.o
108+
obj-$(CONFIG_LAN966X_OIC) += irq-lan966x-oic.o
107109
obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o
108110
obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o
109111
obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o

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