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Merge tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.6, round 1 Highlights: ---------- - MCU: - Add CAN support on stm32f746. - Add touchscreen support (edt-ft5306) on stm32f746-disco. - Add support to Rocktech RK043FN48H display on stm32f746-disco board. - Add gpio-ranges for stm32f7 to fix boot issue. - MPU: - STM32MP13: - Remove shmem for scmi-optee to match with OP-TEE configuration. - Enable OP-TEE asynchronous notification by using PPI#15. - Expose and use SCMI regulators on stm32mp135f-dk. - STMP32MP15: - Remove shmem for scmi-optee to match with OPTEE configuration - Deduplicate DSI node to fix #address-cells/#size-cells issue on boards using it. - ST: - Fix dts check warnings on stm32mp15-scmi boards. - DH: - Add missing detach mailbox for DHCOM and DHCOR SoM. - Odyssey: - Add missing detach mailbox for Odyssey SoM. - OCTAVO: - Add Linux Automation Test Automation Controller (LXA TAC) based on Octavo Systems OSD32MP15x SiP. It contains: eMMC, DSA-capable ETH switch (2 ports), dual CAN... It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based on STM32MP157. - PROTONIC: - Add Power over Data Line (PoDL) Power Source Equipment (PSE) regulator nodes on PRTT1C board. It allows power delivery and data transmission over a single twisted pair. * tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits) ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs ARM: dts: stm32: support display on stm32f746-disco board ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: add ltdc support on stm32f746 MCU ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes ARM: dts: stm32: add touchscreen on stm32f746-disco board ARM: dts: stm32: add pin map for i2c3 controller on stm32f7 ARM: dts: stm32: re-add CAN support on stm32f746 ... Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 1298d0d + 4c757f6 commit aa2951a

27 files changed

+1459
-191
lines changed

‎Documentation/devicetree/bindings/arm/stm32/stm32.yaml

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,9 @@ properties:
143143
- description: Octavo OSD32MP15x System-in-Package based boards
144144
items:
145145
- enum:
146-
- lxa,stm32mp157c-mc1 # Linux Automation MC-1
146+
- lxa,stm32mp157c-mc1 # Linux Automation MC-1
147+
- lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1)
148+
- lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2)
147149
- const: oct,stm32mp15xx-osd32
148150
- enum:
149151
- st,stm32mp157

‎Documentation/devicetree/bindings/net/can/bosch,m_can.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,7 @@ required:
128128
- clock-names
129129
- bosch,mram-cfg
130130

131-
additionalProperties: false
131+
unevaluatedProperties: false
132132

133133
examples:
134134
- |

‎Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,9 @@ properties:
4949
Set if the output SYNCLKO clock should be disabled. Do not mix with
5050
microchip,synclko-125.
5151

52+
interrupts:
53+
maxItems: 1
54+
5255
required:
5356
- compatible
5457
- reg

‎arch/arm/boot/dts/st/Makefile

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Original file line numberDiff line numberDiff line change
@@ -56,6 +56,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
5656
stm32mp157c-ev1.dtb \
5757
stm32mp157c-ev1-scmi.dtb \
5858
stm32mp157c-lxa-mc1.dtb \
59+
stm32mp157c-lxa-tac-gen1.dtb \
60+
stm32mp157c-lxa-tac-gen2.dtb \
5961
stm32mp157c-odyssey.dtb \
6062
stm32mp157c-phycore-stm32mp1-3.dtb
6163
dtb-$(CONFIG_ARCH_U8500) += \

‎arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -171,6 +171,16 @@
171171
};
172172
};
173173

174+
i2c3_pins_a: i2c3-0 {
175+
pins {
176+
pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */
177+
<STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */
178+
bias-disable;
179+
drive-open-drain;
180+
slew-rate = <0>;
181+
};
182+
};
183+
174184
usbotg_hs_pins_a: usbotg-hs-0 {
175185
pins {
176186
pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
@@ -365,6 +375,41 @@
365375
bias-pull-up;
366376
};
367377
};
378+
379+
380+
ltdc_pins_a: ltdc-0 {
381+
pins {
382+
pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */
383+
<STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */
384+
<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
385+
<STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */
386+
<STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */
387+
<STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */
388+
<STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
389+
<STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
390+
<STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
391+
<STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
392+
<STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
393+
<STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
394+
<STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
395+
<STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
396+
<STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
397+
<STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
398+
<STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */
399+
<STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */
400+
<STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */
401+
<STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */
402+
<STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */
403+
<STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
404+
<STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
405+
<STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
406+
<STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
407+
<STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
408+
<STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */
409+
<STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */
410+
slew-rate = <2>;
411+
};
412+
};
368413
};
369414
};
370415
};

‎arch/arm/boot/dts/st/stm32f746-disco.dts

Lines changed: 65 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -43,8 +43,9 @@
4343
/dts-v1/;
4444
#include "stm32f746.dtsi"
4545
#include "stm32f746-pinctrl.dtsi"
46-
#include <dt-bindings/input/input.h>
4746
#include <dt-bindings/gpio/gpio.h>
47+
#include <dt-bindings/input/input.h>
48+
#include <dt-bindings/interrupt-controller/irq.h>
4849

4950
/ {
5051
model = "STMicroelectronics STM32F746-DISCO board";
@@ -60,6 +61,19 @@
6061
reg = <0xC0000000 0x800000>;
6162
};
6263

64+
reserved-memory {
65+
#address-cells = <1>;
66+
#size-cells = <1>;
67+
ranges;
68+
69+
linux,cma {
70+
compatible = "shared-dma-pool";
71+
no-map;
72+
size = <0x80000>;
73+
linux,dma-default;
74+
};
75+
};
76+
6377
aliases {
6478
serial0 = &usart1;
6579
};
@@ -79,12 +93,31 @@
7993
regulator-always-on;
8094
};
8195

82-
mmc_vcard: mmc_vcard {
96+
vcc_3v3: vcc-3v3 {
8397
compatible = "regulator-fixed";
84-
regulator-name = "mmc_vcard";
98+
regulator-name = "vcc_3v3";
8599
regulator-min-microvolt = <3300000>;
86100
regulator-max-microvolt = <3300000>;
87101
};
102+
103+
backlight: backlight {
104+
compatible = "gpio-backlight";
105+
gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
106+
status = "okay";
107+
};
108+
109+
panel_rgb: panel-rgb {
110+
compatible = "rocktech,rk043fn48h";
111+
power-supply = <&vcc_3v3>;
112+
backlight = <&backlight>;
113+
enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;
114+
status = "okay";
115+
port {
116+
panel_in_rgb: endpoint {
117+
remote-endpoint = <&ltdc_out_rgb>;
118+
};
119+
};
120+
};
88121
};
89122

90123
&clk_hse {
@@ -99,9 +132,37 @@
99132
status = "okay";
100133
};
101134

135+
&i2c3 {
136+
pinctrl-0 = <&i2c3_pins_a>;
137+
pinctrl-names = "default";
138+
clock-frequency = <400000>;
139+
status = "okay";
140+
141+
touchscreen@38 {
142+
compatible = "edt,edt-ft5306";
143+
reg = <0x38>;
144+
interrupt-parent = <&gpioi>;
145+
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
146+
touchscreen-size-x = <480>;
147+
touchscreen-size-y = <272>;
148+
};
149+
};
150+
151+
&ltdc {
152+
pinctrl-0 = <&ltdc_pins_a>;
153+
pinctrl-names = "default";
154+
status = "okay";
155+
156+
port {
157+
ltdc_out_rgb: endpoint {
158+
remote-endpoint = <&panel_in_rgb>;
159+
};
160+
};
161+
};
162+
102163
&sdio1 {
103164
status = "okay";
104-
vmmc-supply = <&mmc_vcard>;
165+
vmmc-supply = <&vcc_3v3>;
105166
cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
106167
pinctrl-names = "default", "opendrain";
107168
pinctrl-0 = <&sdio_pins_a>;

‎arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,4 +8,48 @@
88

99
&pinctrl {
1010
compatible = "st,stm32f746-pinctrl";
11+
12+
gpioa: gpio@40020000 {
13+
gpio-ranges = <&pinctrl 0 0 16>;
14+
};
15+
16+
gpiob: gpio@40020400 {
17+
gpio-ranges = <&pinctrl 0 16 16>;
18+
};
19+
20+
gpioc: gpio@40020800 {
21+
gpio-ranges = <&pinctrl 0 32 16>;
22+
};
23+
24+
gpiod: gpio@40020c00 {
25+
gpio-ranges = <&pinctrl 0 48 16>;
26+
};
27+
28+
gpioe: gpio@40021000 {
29+
gpio-ranges = <&pinctrl 0 64 16>;
30+
};
31+
32+
gpiof: gpio@40021400 {
33+
gpio-ranges = <&pinctrl 0 80 16>;
34+
};
35+
36+
gpiog: gpio@40021800 {
37+
gpio-ranges = <&pinctrl 0 96 16>;
38+
};
39+
40+
gpioh: gpio@40021c00 {
41+
gpio-ranges = <&pinctrl 0 112 16>;
42+
};
43+
44+
gpioi: gpio@40022000 {
45+
gpio-ranges = <&pinctrl 0 128 16>;
46+
};
47+
48+
gpioj: gpio@40022400 {
49+
gpio-ranges = <&pinctrl 0 144 16>;
50+
};
51+
52+
gpiok: gpio@40022800 {
53+
gpio-ranges = <&pinctrl 0 160 8>;
54+
};
1155
};

‎arch/arm/boot/dts/st/stm32f746.dtsi

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -257,6 +257,23 @@
257257
status = "disabled";
258258
};
259259

260+
can3: can@40003400 {
261+
compatible = "st,stm32f4-bxcan";
262+
reg = <0x40003400 0x200>;
263+
interrupts = <104>, <105>, <106>, <107>;
264+
interrupt-names = "tx", "rx0", "rx1", "sce";
265+
resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
266+
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
267+
st,gcan = <&gcan3>;
268+
status = "disabled";
269+
};
270+
271+
gcan3: gcan@40003600 {
272+
compatible = "st,stm32f4-gcan", "syscon";
273+
reg = <0x40003600 0x200>;
274+
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
275+
};
276+
260277
usart2: serial@40004400 {
261278
compatible = "st,stm32f7-uart";
262279
reg = <0x40004400 0x400>;
@@ -337,6 +354,36 @@
337354
status = "disabled";
338355
};
339356

357+
can1: can@40006400 {
358+
compatible = "st,stm32f4-bxcan";
359+
reg = <0x40006400 0x200>;
360+
interrupts = <19>, <20>, <21>, <22>;
361+
interrupt-names = "tx", "rx0", "rx1", "sce";
362+
resets = <&rcc STM32F7_APB1_RESET(CAN1)>;
363+
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
364+
st,can-primary;
365+
st,gcan = <&gcan1>;
366+
status = "disabled";
367+
};
368+
369+
gcan1: gcan@40006600 {
370+
compatible = "st,stm32f4-gcan", "syscon";
371+
reg = <0x40006600 0x200>;
372+
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
373+
};
374+
375+
can2: can@40006800 {
376+
compatible = "st,stm32f4-bxcan";
377+
reg = <0x40006800 0x200>;
378+
interrupts = <63>, <64>, <65>, <66>;
379+
interrupt-names = "tx", "rx0", "rx1", "sce";
380+
resets = <&rcc STM32F7_APB1_RESET(CAN2)>;
381+
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;
382+
st,can-secondary;
383+
st,gcan = <&gcan1>;
384+
status = "disabled";
385+
};
386+
340387
cec: cec@40006c00 {
341388
compatible = "st,stm32-cec";
342389
reg = <0x40006C00 0x400>;
@@ -507,6 +554,16 @@
507554
};
508555
};
509556

557+
ltdc: display-controller@40016800 {
558+
compatible = "st,stm32-ltdc";
559+
reg = <0x40016800 0x200>;
560+
interrupts = <88>, <89>;
561+
resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
562+
clocks = <&rcc 1 CLK_LCD>;
563+
clock-names = "lcd";
564+
status = "disabled";
565+
};
566+
510567
pwrcfg: power-config@40007000 {
511568
compatible = "st,stm32-power-config", "syscon";
512569
reg = <0x40007000 0x400>;

‎arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,4 +8,48 @@
88

99
&pinctrl {
1010
compatible = "st,stm32f769-pinctrl";
11+
12+
gpioa: gpio@40020000 {
13+
gpio-ranges = <&pinctrl 0 0 16>;
14+
};
15+
16+
gpiob: gpio@40020400 {
17+
gpio-ranges = <&pinctrl 0 16 16>;
18+
};
19+
20+
gpioc: gpio@40020800 {
21+
gpio-ranges = <&pinctrl 0 32 16>;
22+
};
23+
24+
gpiod: gpio@40020c00 {
25+
gpio-ranges = <&pinctrl 0 48 16>;
26+
};
27+
28+
gpioe: gpio@40021000 {
29+
gpio-ranges = <&pinctrl 0 64 16>;
30+
};
31+
32+
gpiof: gpio@40021400 {
33+
gpio-ranges = <&pinctrl 0 80 16>;
34+
};
35+
36+
gpiog: gpio@40021800 {
37+
gpio-ranges = <&pinctrl 0 96 16>;
38+
};
39+
40+
gpioh: gpio@40021c00 {
41+
gpio-ranges = <&pinctrl 0 112 16>;
42+
};
43+
44+
gpioi: gpio@40022000 {
45+
gpio-ranges = <&pinctrl 0 128 16>;
46+
};
47+
48+
gpioj: gpio@40022400 {
49+
gpio-ranges = <&pinctrl 0 144 16>;
50+
};
51+
52+
gpiok: gpio@40022800 {
53+
gpio-ranges = <&pinctrl 0 160 8>;
54+
};
1155
};

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