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Merge tag 'dmaengine-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "A bunch of new support and few updates to drivers: New support: - DMA_MEMCPY_SG support is bought back as we have a user in Xilinx driver - Support for TI J721S2 SoC in k3-udma driver - Support for Ingenic MDMA and BDMA in the JZ4760 - Support for Renesas r8a779f0 dmac Updates: - We are finally getting rid of slave_id, so this brings in the changes across tree for that - updates for idxd driver - at_xdmac driver cleanup" * tag 'dmaengine-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (60 commits) dt-bindings: dma-controller: Split interrupt fields in example dmaengine: pch_dma: Remove usage of the deprecated "pci-dma-compat.h" API dmaengine: at_xdmac: Fix race over irq_status dmaengine: at_xdmac: Remove a level of indentation in at_xdmac_tasklet() dmaengine: at_xdmac: Fix at_xdmac_lld struct definition dmaengine: at_xdmac: Fix lld view setting dmaengine: at_xdmac: Remove a level of indentation in at_xdmac_advance_work() dmaengine: at_xdmac: Fix concurrency over xfers_list dmaengine: at_xdmac: Move the free desc to the tail of the desc list dmaengine: at_xdmac: Fix race for the tx desc callback dmaengine: at_xdmac: Fix concurrency over chan's completed_cookie dmaengine: at_xdmac: Print debug message after realeasing the lock dmaengine: at_xdmac: Start transfer for cyclic channels in issue_pending dmaengine: at_xdmac: Don't start transactions at tx_submit level dmaengine: idxd: deprecate token sysfs attributes for read buffers dmaengine: idxd: change bandwidth token to read buffers dmaengine: idxd: fix wq settings post wq disable dmaengine: idxd: change MSIX allocation based on per wq activation dmaengine: idxd: fix descriptor flushing locking dmaengine: idxd: embed irq_entry in idxd_wq struct ...
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‎Documentation/ABI/stable/sysfs-driver-dma-idxd

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@@ -41,14 +41,14 @@ KernelVersion: 5.6.0
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Contact: dmaengine@vger.kernel.org
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Description: The maximum number of groups can be created under this device.
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What: /sys/bus/dsa/devices/dsa<m>/max_tokens
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Date: Oct 25, 2019
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KernelVersion: 5.6.0
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What: /sys/bus/dsa/devices/dsa<m>/max_read_buffers
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Date: Dec 10, 2021
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KernelVersion: 5.17.0
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Contact: dmaengine@vger.kernel.org
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Description: The total number of bandwidth tokens supported by this device.
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The bandwidth tokens represent resources within the DSA
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Description: The total number of read buffers supported by this device.
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The read buffers represent resources within the DSA
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implementation, and these resources are allocated by engines to
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support operations.
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support operations. See DSA spec v1.2 9.2.4 Total Read Buffers.
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What: /sys/bus/dsa/devices/dsa<m>/max_transfer_size
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Date: Oct 25, 2019
@@ -115,13 +115,13 @@ KernelVersion: 5.6.0
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Contact: dmaengine@vger.kernel.org
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Description: To indicate if this device is configurable or not.
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What: /sys/bus/dsa/devices/dsa<m>/token_limit
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Date: Oct 25, 2019
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KernelVersion: 5.6.0
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What: /sys/bus/dsa/devices/dsa<m>/read_buffer_limit
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Date: Dec 10, 2021
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KernelVersion: 5.17.0
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Contact: dmaengine@vger.kernel.org
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Description: The maximum number of bandwidth tokens that may be in use at
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Description: The maximum number of read buffers that may be in use at
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one time by operations that access low bandwidth memory in the
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device.
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device. See DSA spec v1.2 9.2.8 GENCFG on Global Read Buffer Limit.
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What: /sys/bus/dsa/devices/dsa<m>/cmd_status
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Date: Aug 28, 2020
@@ -220,8 +220,38 @@ Contact: dmaengine@vger.kernel.org
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Description: Show the current number of entries in this WQ if WQ Occupancy
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Support bit WQ capabilities is 1.
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What: /sys/bus/dsa/devices/wq<m>.<n>/enqcmds_retries
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Date Oct 29, 2021
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KernelVersion: 5.17.0
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Contact: dmaengine@vger.kernel.org
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Description: Indicate the number of retires for an enqcmds submission on a sharedwq.
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A max value to set attribute is capped at 64.
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What: /sys/bus/dsa/devices/engine<m>.<n>/group_id
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Date: Oct 25, 2019
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KernelVersion: 5.6.0
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Contact: dmaengine@vger.kernel.org
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Description: The group that this engine belongs to.
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What: /sys/bus/dsa/devices/group<m>.<n>/use_read_buffer_limit
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Date: Dec 10, 2021
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KernelVersion: 5.17.0
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Contact: dmaengine@vger.kernel.org
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Description: Enable the use of global read buffer limit for the group. See DSA
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spec v1.2 9.2.18 GRPCFG Use Global Read Buffer Limit.
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What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_allowed
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Date: Dec 10, 2021
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KernelVersion: 5.17.0
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Contact: dmaengine@vger.kernel.org
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Description: Indicates max number of read buffers that may be in use at one time
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by all engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read
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Buffers Allowed.
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What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_reserved
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Date: Dec 10, 2021
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KernelVersion: 5.17.0
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Contact: dmaengine@vger.kernel.org
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Description: Indicates the number of Read Buffers reserved for the use of
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engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers
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Reserved.

‎Documentation/devicetree/bindings/dma/arm,pl330.yaml

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@@ -0,0 +1,83 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/arm,pl330.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM PrimeCell PL330 DMA Controller
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maintainers:
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- Vinod Koul <vkoul@kernel.org>
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description:
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The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
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between memory and peripherals or memory to memory.
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# We need a select here so we don't match all nodes with 'arm,primecell'
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select:
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properties:
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compatible:
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contains:
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const: arm,pl330
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required:
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- compatible
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allOf:
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- $ref: dma-controller.yaml#
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- $ref: /schemas/arm/primecell.yaml#
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properties:
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compatible:
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items:
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- enum:
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- arm,pl330
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- const: arm,primecell
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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maxItems: 32
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description: A single combined interrupt or an interrupt per event
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'#dma-cells':
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const: 1
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description: Contains the DMA request number for the consumer
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arm,pl330-broken-no-flushp:
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type: boolean
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description: quirk for avoiding to execute DMAFLUSHP
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arm,pl330-periph-burst:
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type: boolean
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description: quirk for performing burst transfer only
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dma-coherent: true
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resets:
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minItems: 1
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maxItems: 2
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reset-names:
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minItems: 1
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items:
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- const: dma
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- const: dma-ocp
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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dma-controller@12680000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x12680000 0x1000>;
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interrupts = <99>;
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#dma-cells = <1>;
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};
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...

‎Documentation/devicetree/bindings/dma/arm-pl08x.yaml

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- Vinod Koul <vkoul@kernel.org>
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allOf:
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- $ref: /schemas/arm/primecell.yaml#
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- $ref: "dma-controller.yaml#"
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# We need a select here so we don't match all nodes with 'arm,primecell'
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- 64
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description: bus width used for memcpy in bits. FTDMAC020 also accept 64 bits
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resets:
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maxItems: 1
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required:
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- reg
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- interrupts

‎Documentation/devicetree/bindings/dma/arm-pl330.txt

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This file was deleted.

‎Documentation/devicetree/bindings/dma/dma-controller.yaml

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dma: dma-controller@48000000 {
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compatible = "ti,omap-sdma";
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reg = <0x48000000 0x1000>;
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interrupts = <0 12 0x4
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0 13 0x4
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0 14 0x4
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0 15 0x4>;
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interrupts = <0 12 0x4>,
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<0 13 0x4>,
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<0 14 0x4>,
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<0 15 0x4>;
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#dma-cells = <1>;
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dma-channels = <32>;
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dma-requests = <127>;

‎Documentation/devicetree/bindings/dma/ingenic,dma.yaml

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@@ -14,15 +14,23 @@ allOf:
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properties:
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compatible:
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enum:
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- ingenic,jz4740-dma
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- ingenic,jz4725b-dma
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- ingenic,jz4760-dma
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- ingenic,jz4760b-dma
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- ingenic,jz4770-dma
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- ingenic,jz4780-dma
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- ingenic,x1000-dma
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- ingenic,x1830-dma
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oneOf:
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- enum:
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- ingenic,jz4740-dma
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- ingenic,jz4725b-dma
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- ingenic,jz4760-dma
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- ingenic,jz4760-bdma
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- ingenic,jz4760-mdma
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- ingenic,jz4760b-dma
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- ingenic,jz4760b-bdma
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- ingenic,jz4760b-mdma
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- ingenic,jz4770-dma
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- ingenic,jz4780-dma
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- ingenic,x1000-dma
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- ingenic,x1830-dma
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- items:
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- const: ingenic,jz4770-bdma
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- const: ingenic,jz4760b-bdma
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reg:
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items:
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maxItems: 1
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"#dma-cells":
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const: 2
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enum: [2, 3]
4048
description: >
4149
DMA clients must use the format described in dma.txt, giving a phandle
42-
to the DMA controller plus the following 2 integer cells:
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- Request type: The DMA request type for transfers to/from the
45-
device on the allocated channel, as defined in the SoC documentation.
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to the DMA controller plus the following integer cells:
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- Request type: The DMA request type specifies the device endpoint that
53+
will be the source or destination of the DMA transfer.
54+
If "#dma-cells" is 2, the request type is a single cell, and the
55+
direction will be unidirectional (either RX or TX but not both).
56+
If "#dma-cells" is 3, the request type has two cells; the first
57+
one corresponds to the host to device direction (TX), the second one
58+
corresponds to the device to host direction (RX). The DMA channel is
59+
then bidirectional.
4660
4761
- Channel: If set to 0xffffffff, any available channel will be allocated
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for the client. Otherwise, the exact channel specified will be used.

‎Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml

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- items:
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- const: renesas,dmac-r8a779a0 # R-Car V3U
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- items:
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- const: renesas,dmac-r8a779f0 # R-Car S4-8
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- const: renesas,rcar-gen4-dmac
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4751
reg: true
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4953
interrupts:
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118122
contains:
119123
enum:
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- renesas,dmac-r8a779a0
125+
- renesas,rcar-gen4-dmac
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then:
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properties:
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reg:

‎Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml

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minimum: 1
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maximum: 8
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resets:
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maxItems: 1
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snps,dma-masters:
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description: |
5861
Number of AXI masters supported by the hardware.

‎Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml

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allOf:
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- $ref: /schemas/dma/dma-controller.yaml#
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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properties:
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compatible:

‎Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml

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allOf:
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- $ref: /schemas/dma/dma-controller.yaml#
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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properties:
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compatible:

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