Skip to content

Commit 9828a1c

Browse files
aeglbp3tk0v
authored andcommitted
perf/x86/intel/uncore: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model. [ bp: Squash *three* uncore patches into one. ] Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/all/20240424181501.41557-1-tony.luck%40intel.com
1 parent a7011b8 commit 9828a1c

File tree

3 files changed

+55
-53
lines changed

3 files changed

+55
-53
lines changed

arch/x86/events/intel/uncore.c

Lines changed: 50 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -1829,56 +1829,56 @@ static const struct intel_uncore_init_fun generic_uncore_init __initconst = {
18291829
};
18301830

18311831
static const struct x86_cpu_id intel_uncore_match[] __initconst = {
1832-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_uncore_init),
1833-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_uncore_init),
1834-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_uncore_init),
1835-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_uncore_init),
1836-
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_uncore_init),
1837-
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &ivb_uncore_init),
1838-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &hsw_uncore_init),
1839-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hsw_uncore_init),
1840-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &hsw_uncore_init),
1841-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &bdw_uncore_init),
1842-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &bdw_uncore_init),
1843-
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snbep_uncore_init),
1844-
X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhmex_uncore_init),
1845-
X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhmex_uncore_init),
1846-
X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &ivbep_uncore_init),
1847-
X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &hswep_uncore_init),
1848-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &bdx_uncore_init),
1849-
X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &bdx_uncore_init),
1850-
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_uncore_init),
1851-
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_uncore_init),
1852-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &skl_uncore_init),
1853-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &skl_uncore_init),
1854-
X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &skx_uncore_init),
1855-
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &skl_uncore_init),
1856-
X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &skl_uncore_init),
1857-
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &skl_uncore_init),
1858-
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &skl_uncore_init),
1859-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_uncore_init),
1860-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &icl_uncore_init),
1861-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_uncore_init),
1862-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_uncore_init),
1863-
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_uncore_init),
1864-
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_l_uncore_init),
1865-
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_uncore_init),
1866-
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rkl_uncore_init),
1867-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_uncore_init),
1868-
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_uncore_init),
1869-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init),
1870-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init),
1871-
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init),
1872-
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &mtl_uncore_init),
1873-
X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &mtl_uncore_init),
1874-
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init),
1875-
X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &spr_uncore_init),
1876-
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &gnr_uncore_init),
1877-
X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &gnr_uncore_init),
1878-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
1879-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_uncore_init),
1880-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &gnr_uncore_init),
1881-
X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &gnr_uncore_init),
1832+
X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_uncore_init),
1833+
X86_MATCH_VFM(INTEL_NEHALEM, &nhm_uncore_init),
1834+
X86_MATCH_VFM(INTEL_WESTMERE, &nhm_uncore_init),
1835+
X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_uncore_init),
1836+
X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_uncore_init),
1837+
X86_MATCH_VFM(INTEL_IVYBRIDGE, &ivb_uncore_init),
1838+
X86_MATCH_VFM(INTEL_HASWELL, &hsw_uncore_init),
1839+
X86_MATCH_VFM(INTEL_HASWELL_L, &hsw_uncore_init),
1840+
X86_MATCH_VFM(INTEL_HASWELL_G, &hsw_uncore_init),
1841+
X86_MATCH_VFM(INTEL_BROADWELL, &bdw_uncore_init),
1842+
X86_MATCH_VFM(INTEL_BROADWELL_G, &bdw_uncore_init),
1843+
X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snbep_uncore_init),
1844+
X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhmex_uncore_init),
1845+
X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhmex_uncore_init),
1846+
X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &ivbep_uncore_init),
1847+
X86_MATCH_VFM(INTEL_HASWELL_X, &hswep_uncore_init),
1848+
X86_MATCH_VFM(INTEL_BROADWELL_X, &bdx_uncore_init),
1849+
X86_MATCH_VFM(INTEL_BROADWELL_D, &bdx_uncore_init),
1850+
X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_uncore_init),
1851+
X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_uncore_init),
1852+
X86_MATCH_VFM(INTEL_SKYLAKE, &skl_uncore_init),
1853+
X86_MATCH_VFM(INTEL_SKYLAKE_L, &skl_uncore_init),
1854+
X86_MATCH_VFM(INTEL_SKYLAKE_X, &skx_uncore_init),
1855+
X86_MATCH_VFM(INTEL_KABYLAKE_L, &skl_uncore_init),
1856+
X86_MATCH_VFM(INTEL_KABYLAKE, &skl_uncore_init),
1857+
X86_MATCH_VFM(INTEL_COMETLAKE_L, &skl_uncore_init),
1858+
X86_MATCH_VFM(INTEL_COMETLAKE, &skl_uncore_init),
1859+
X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_uncore_init),
1860+
X86_MATCH_VFM(INTEL_ICELAKE_NNPI, &icl_uncore_init),
1861+
X86_MATCH_VFM(INTEL_ICELAKE, &icl_uncore_init),
1862+
X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_uncore_init),
1863+
X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_uncore_init),
1864+
X86_MATCH_VFM(INTEL_TIGERLAKE_L, &tgl_l_uncore_init),
1865+
X86_MATCH_VFM(INTEL_TIGERLAKE, &tgl_uncore_init),
1866+
X86_MATCH_VFM(INTEL_ROCKETLAKE, &rkl_uncore_init),
1867+
X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_uncore_init),
1868+
X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_uncore_init),
1869+
X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_uncore_init),
1870+
X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_uncore_init),
1871+
X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_uncore_init),
1872+
X86_MATCH_VFM(INTEL_METEORLAKE, &mtl_uncore_init),
1873+
X86_MATCH_VFM(INTEL_METEORLAKE_L, &mtl_uncore_init),
1874+
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &spr_uncore_init),
1875+
X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &spr_uncore_init),
1876+
X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &gnr_uncore_init),
1877+
X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &gnr_uncore_init),
1878+
X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &snr_uncore_init),
1879+
X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_uncore_init),
1880+
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &gnr_uncore_init),
1881+
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &gnr_uncore_init),
18821882
{},
18831883
};
18841884
MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);

arch/x86/events/intel/uncore_nhmex.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/* Nehalem-EX/Westmere-EX uncore support */
3+
#include <asm/cpu_device_id.h>
34
#include "uncore.h"
45

56
/* NHM-EX event control */
@@ -1217,7 +1218,7 @@ static struct intel_uncore_type *nhmex_msr_uncores[] = {
12171218

12181219
void nhmex_uncore_cpu_init(void)
12191220
{
1220-
if (boot_cpu_data.x86_model == 46)
1221+
if (boot_cpu_data.x86_vfm == INTEL_NEHALEM_EX)
12211222
uncore_nhmex = true;
12221223
else
12231224
nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;

arch/x86/events/intel/uncore_snbep.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/* SandyBridge-EP/IvyTown uncore support */
3+
#include <asm/cpu_device_id.h>
34
#include "uncore.h"
45
#include "uncore_discovery.h"
56

@@ -3285,7 +3286,7 @@ void bdx_uncore_cpu_init(void)
32853286
uncore_msr_uncores = bdx_msr_uncores;
32863287

32873288
/* Detect systems with no SBOXes */
3288-
if ((boot_cpu_data.x86_model == 86) || hswep_has_limit_sbox(BDX_PCU_DID))
3289+
if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_D || hswep_has_limit_sbox(BDX_PCU_DID))
32893290
uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
32903291

32913292
hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
@@ -5394,7 +5395,7 @@ static int icx_iio_get_topology(struct intel_uncore_type *type)
53945395
static void icx_iio_set_mapping(struct intel_uncore_type *type)
53955396
{
53965397
/* Detect ICX-D system. This case is not supported */
5397-
if (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_D) {
5398+
if (boot_cpu_data.x86_vfm == INTEL_ICELAKE_D) {
53985399
pmu_clear_mapping_attr(type->attr_update, &icx_iio_mapping_group);
53995400
return;
54005401
}

0 commit comments

Comments
 (0)