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20 | 20 | #include <linux/i2c.h>
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21 | 21 | #include <linux/spi/spi.h>
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22 | 22 | #include <linux/bcd.h>
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| 23 | +#include <linux/bitfield.h> |
23 | 24 | #include <linux/rtc.h>
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24 | 25 | #include <linux/slab.h>
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25 | 26 | #include <linux/module.h>
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48 | 49 | #define PCF2127_BIT_CTRL3_BLF BIT(2)
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49 | 50 | #define PCF2127_BIT_CTRL3_BF BIT(3)
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50 | 51 | #define PCF2127_BIT_CTRL3_BTSE BIT(4)
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| 52 | +#define PCF2127_CTRL3_PM GENMASK(7, 5) |
51 | 53 | /* Time and date registers */
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52 | 54 | #define PCF2127_REG_TIME_BASE 0x03
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53 | 55 | #define PCF2127_BIT_SC_OSF BIT(7)
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@@ -331,6 +333,84 @@ static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
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331 | 333 | return 0;
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332 | 334 | }
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333 | 335 |
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| 336 | +static int pcf2127_param_get(struct device *dev, struct rtc_param *param) |
| 337 | +{ |
| 338 | + struct pcf2127 *pcf2127 = dev_get_drvdata(dev); |
| 339 | + u32 value; |
| 340 | + int ret; |
| 341 | + |
| 342 | + switch (param->param) { |
| 343 | + case RTC_PARAM_BACKUP_SWITCH_MODE: |
| 344 | + ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &value); |
| 345 | + if (ret < 0) |
| 346 | + return ret; |
| 347 | + |
| 348 | + value = FIELD_GET(PCF2127_CTRL3_PM, value); |
| 349 | + |
| 350 | + if (value < 0x3) |
| 351 | + param->uvalue = RTC_BSM_LEVEL; |
| 352 | + else if (value < 0x6) |
| 353 | + param->uvalue = RTC_BSM_DIRECT; |
| 354 | + else |
| 355 | + param->uvalue = RTC_BSM_DISABLED; |
| 356 | + |
| 357 | + break; |
| 358 | + |
| 359 | + default: |
| 360 | + return -EINVAL; |
| 361 | + } |
| 362 | + |
| 363 | + return 0; |
| 364 | +} |
| 365 | + |
| 366 | +static int pcf2127_param_set(struct device *dev, struct rtc_param *param) |
| 367 | +{ |
| 368 | + struct pcf2127 *pcf2127 = dev_get_drvdata(dev); |
| 369 | + u8 mode = 0; |
| 370 | + u32 value; |
| 371 | + int ret; |
| 372 | + |
| 373 | + switch (param->param) { |
| 374 | + case RTC_PARAM_BACKUP_SWITCH_MODE: |
| 375 | + ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &value); |
| 376 | + if (ret < 0) |
| 377 | + return ret; |
| 378 | + |
| 379 | + value = FIELD_GET(PCF2127_CTRL3_PM, value); |
| 380 | + |
| 381 | + if (value > 5) |
| 382 | + value -= 5; |
| 383 | + else if (value > 2) |
| 384 | + value -= 3; |
| 385 | + |
| 386 | + switch (param->uvalue) { |
| 387 | + case RTC_BSM_LEVEL: |
| 388 | + break; |
| 389 | + case RTC_BSM_DIRECT: |
| 390 | + mode = 3; |
| 391 | + break; |
| 392 | + case RTC_BSM_DISABLED: |
| 393 | + if (value == 0) |
| 394 | + value = 1; |
| 395 | + mode = 5; |
| 396 | + break; |
| 397 | + default: |
| 398 | + return -EINVAL; |
| 399 | + } |
| 400 | + |
| 401 | + return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, |
| 402 | + PCF2127_CTRL3_PM, |
| 403 | + FIELD_PREP(PCF2127_CTRL3_PM, mode + value)); |
| 404 | + |
| 405 | + break; |
| 406 | + |
| 407 | + default: |
| 408 | + return -EINVAL; |
| 409 | + } |
| 410 | + |
| 411 | + return 0; |
| 412 | +} |
| 413 | + |
334 | 414 | static int pcf2127_rtc_ioctl(struct device *dev,
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335 | 415 | unsigned int cmd, unsigned long arg)
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336 | 416 | {
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@@ -741,6 +821,8 @@ static const struct rtc_class_ops pcf2127_rtc_ops = {
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741 | 821 | .read_alarm = pcf2127_rtc_read_alarm,
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742 | 822 | .set_alarm = pcf2127_rtc_set_alarm,
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743 | 823 | .alarm_irq_enable = pcf2127_rtc_alarm_irq_enable,
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| 824 | + .param_get = pcf2127_param_get, |
| 825 | + .param_set = pcf2127_param_set, |
744 | 826 | };
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745 | 827 |
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746 | 828 | /* sysfs interface */
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