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irqchip/riscv-intc: Allow large non-standard interrupt number
Currently, the implementation of the RISC-V INTC driver uses the interrupt cause as the hardware interrupt number, with a maximum of 64 interrupts. However, the platform can expand the interrupt number further for custom local interrupts. To fully utilize the available local interrupt sources, switch to using irq_domain_create_tree() that creates the radix tree map, add global variables (riscv_intc_nr_irqs, riscv_intc_custom_base and riscv_intc_custom_nr_irqs) to determine the valid range of local interrupt number (hwirq). Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Randolph <randolph@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20240222083946.3977135-3-peterlin@andestech.com
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drivers/irqchip/irq-riscv-intc.c

Lines changed: 19 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19,15 +19,16 @@
1919
#include <linux/smp.h>
2020

2121
static struct irq_domain *intc_domain;
22+
static unsigned int riscv_intc_nr_irqs __ro_after_init = BITS_PER_LONG;
23+
static unsigned int riscv_intc_custom_base __ro_after_init = BITS_PER_LONG;
24+
static unsigned int riscv_intc_custom_nr_irqs __ro_after_init;
2225

2326
static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
2427
{
2528
unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
2629

27-
if (unlikely(cause >= BITS_PER_LONG))
28-
panic("unexpected interrupt cause");
29-
30-
generic_handle_domain_irq(intc_domain, cause);
30+
if (generic_handle_domain_irq(intc_domain, cause))
31+
pr_warn_ratelimited("Failed to handle interrupt (cause: %ld)\n", cause);
3132
}
3233

3334
/*
@@ -93,6 +94,14 @@ static int riscv_intc_domain_alloc(struct irq_domain *domain,
9394
if (ret)
9495
return ret;
9596

97+
/*
98+
* Only allow hwirq for which we have corresponding standard or
99+
* custom interrupt enable register.
100+
*/
101+
if ((hwirq >= riscv_intc_nr_irqs && hwirq < riscv_intc_custom_base) ||
102+
(hwirq >= riscv_intc_custom_base + riscv_intc_custom_nr_irqs))
103+
return -EINVAL;
104+
96105
for (i = 0; i < nr_irqs; i++) {
97106
ret = riscv_intc_domain_map(domain, virq + i, hwirq + i);
98107
if (ret)
@@ -117,8 +126,7 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
117126
{
118127
int rc;
119128

120-
intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
121-
&riscv_intc_domain_ops, NULL);
129+
intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops, NULL);
122130
if (!intc_domain) {
123131
pr_err("unable to add IRQ domain\n");
124132
return -ENXIO;
@@ -132,7 +140,11 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
132140

133141
riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
134142

135-
pr_info("%d local interrupts mapped\n", BITS_PER_LONG);
143+
pr_info("%d local interrupts mapped\n", riscv_intc_nr_irqs);
144+
if (riscv_intc_custom_nr_irqs) {
145+
pr_info("%d custom local interrupts mapped\n",
146+
riscv_intc_custom_nr_irqs);
147+
}
136148

137149
return 0;
138150
}

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