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Merge tag 'qcom-clk-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson: This introduces display clock controllers are introduces for SM6115 and SM8450, and SC8280XP gains a GPU clock controller. MSM8909 and SM6375 gains global and SMD RPM clock controller drivers. The handling of GDSCs with PWRSTS_RET was fixed, to keep the GDSC on while powering down the parent supply. This solved retention issues during suspend of USB on sc7180/7280 and SC8280XP. SM6115 and QCM2260 are moved to reuse PLL configuration. SDM660 SDCC1 was moved to floor ops. Support for the APCS PLLs for IPQ8064, IPQ8074 and IPQ6018 was added/fixed. The MSM8996 CPU clocks was updated, with support for ACD clocks added. Support for SDM670 was added to the SDM845 Glbal clock controller and the RPMh clock controller driver. Transition to parent_data, parent_hws and use of ARRAY_SIZE() for num_parents was done for MSM8660, MSM8916, MSM8939, MSM8960 global clock controllers, IPQ8064 LPASS clock controller and MSM8960 multimedia clock controller. Support for per-reset defined delay of was introduced. * tag 'qcom-clk-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (93 commits) clk: qcom: gcc-msm8939: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-msm8939: use parent_hws where possible dt-bindings: clock: move qcom,gcc-msm8939 to qcom,gcc-msm8916.yaml clk: qcom: gcc-sm6350: Update the .pwrsts for usb gdscs clk: qcom: gcc-sc8280xp: use retention for USB power domains clk: qcom: gdsc: add missing error handling dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos clk: qcom: Add global clock controller driver for SM6375 dt-bindings: clock: add SM6375 QCOM global clock bindings clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc clk: qcom: gdsc: Fix the handling of PWRSTS_RET support clk: qcom: Add SC8280XP GPU clock controller dt-bindings: clock: Add Qualcomm SC8280XP GPU binding clk: qcom: smd: Add SM6375 clocks dt-bindings: clock: qcom: rpmcc: Add BIMC_FREQ_LOG dt-bindings: clock: qcom,rpmcc: Add compatible for SM6375 clk: qcom: rpmhcc: add sdm670 clocks dt-bindings: clock: add rpmhcc bindings for sdm670 ...
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‎Documentation/devicetree/bindings/clock/qcom,a53pll.yaml

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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm A53 PLL Binding
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maintainers:
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- Sivaprakash Murugesan <sivaprak@codeaurora.org>
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- Bjorn Andersson <andersson@kernel.org>
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description:
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The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
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compatible:
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enum:
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- qcom,ipq6018-a53pll
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- qcom,ipq8074-a53pll
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- qcom,msm8916-a53pll
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- qcom,msm8939-a53pll
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‎Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml

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description: child tsens device
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$ref: /schemas/thermal/qcom-tsens.yaml#
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: cxo
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- const: pxo
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- const: pll4
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nvmem-cells:
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minItems: 1
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maxItems: 2

‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml

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# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller Binding for MSM8660
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm global clock control module which supports the clocks and resets on
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MSM8660
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See also:
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- dt-bindings/clock/qcom,gcc-msm8660.h
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- dt-bindings/reset/qcom,gcc-msm8660.h
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allOf:
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- $ref: "qcom,gcc.yaml#"
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properties:
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compatible:
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enum:
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- qcom,gcc-msm8660
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: pxo
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- const: cxo
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required:
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- compatible
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unevaluatedProperties: false
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examples:
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# Example for GCC for MSM8974:
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- |
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clock-controller@900000 {
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compatible = "qcom,gcc-msm8660";
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reg = <0x900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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clocks = <&pxo_board>, <&cxo_board>;
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clock-names = "pxo", "cxo";
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};
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...

‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller Binding for MSM8909
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maintainers:
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- Stephan Gerhold <stephan@gerhold.net>
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description: |
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Qualcomm global clock control module which supports the clocks, resets and
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power domains on MSM8909.
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See also:
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- dt-bindings/clock/qcom,gcc-msm8909.h
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properties:
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compatible:
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const: qcom,gcc-msm8909
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clocks:
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items:
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- description: XO source
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- description: Sleep clock source
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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clock-names:
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items:
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- const: xo
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- const: sleep_clk
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- const: dsi0pll
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- const: dsi0pllbyte
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required:
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- compatible
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- clocks
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- clock-names
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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gcc: clock-controller@1800000 {
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compatible = "qcom,gcc-msm8909";
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reg = <0x01800000 0x80000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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clocks = <&xo_board>, <&sleep_clk>, <&dsi0_phy 1>, <&dsi0_phy 0>;
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clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte";
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};
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...

‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml

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# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller Binding for MSM8916 and MSM8939
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm global clock control module which supports the clocks, resets and
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power domains on MSM8916 or MSM8939.
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See also:
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- dt-bindings/clock/qcom,gcc-msm8916.h
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- dt-bindings/clock/qcom,gcc-msm8939.h
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- dt-bindings/reset/qcom,gcc-msm8916.h
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- dt-bindings/reset/qcom,gcc-msm8939.h
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properties:
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compatible:
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enum:
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- qcom,gcc-msm8916
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- qcom,gcc-msm8939
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clocks:
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items:
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- description: XO source
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- description: Sleep clock source
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- description: DSI phy instance 0 dsi clock
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- description: DSI phy instance 0 byte clock
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- description: External MCLK clock
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- description: External Primary I2S clock
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- description: External Secondary I2S clock
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clock-names:
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items:
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- const: xo
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- const: sleep_clk
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: ext_mclk
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- const: ext_pri_i2s
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- const: ext_sec_i2s
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required:
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- compatible
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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clock-controller@300000 {
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compatible = "qcom,gcc-msm8916";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0x300000 0x90000>;
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};
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...

‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml

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description:
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Phandle to voltage regulator providing power to the GX domain.
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- vdd_gfx-supply
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |

‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml

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- const: xo
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- const: sleep
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |

‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml

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- const: ufs_rx_symbol_1_clk_src
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- const: ufs_tx_symbol_0_clk_src
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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protected-clocks:
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description:
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Protected clock specifier list as per common clock binding.
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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‎Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml

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- const: core_bi_pll_test_se # Optional clock
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minItems: 2
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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protected-clocks:
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description:
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Protected clock specifier list as per common clock binding.
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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‎Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml

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- dt-bindings/clock/qcom,gcc-ipq4019.h
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- dt-bindings/clock/qcom,gcc-ipq6018.h
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- dt-bindings/reset/qcom,gcc-ipq6018.h
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- dt-bindings/clock/qcom,gcc-msm8939.h
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- dt-bindings/clock/qcom,gcc-msm8953.h
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- dt-bindings/reset/qcom,gcc-msm8939.h
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- dt-bindings/clock/qcom,gcc-msm8660.h
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- dt-bindings/reset/qcom,gcc-msm8660.h
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- dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
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- dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
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- dt-bindings/clock/qcom,gcc-mdm9607.h
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- qcom,gcc-ipq6018
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- qcom,gcc-mdm9607
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- qcom,gcc-msm8226
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- qcom,gcc-msm8660
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- qcom,gcc-msm8916
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- qcom,gcc-msm8939
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- qcom,gcc-msm8953
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- qcom,gcc-msm8974
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- qcom,gcc-msm8974pro

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