Skip to content

Commit 8ec8490

Browse files
D Scott Phillipsctmarinas
authored andcommitted
arm64: Fix bit-shifting UB in the MIDR_CPU_MODEL() macro
CONFIG_UBSAN_SHIFT with gcc-5 complains that the shifting of ARM_CPU_IMP_AMPERE (0xC0) into bits [31:24] by MIDR_CPU_MODEL() is undefined behavior. Well, sort of, it actually spells the error as: arch/arm64/kernel/proton-pack.c: In function 'spectre_bhb_loop_affected': arch/arm64/include/asm/cputype.h:44:2: error: initializer element is not constant (((imp) << MIDR_IMPLEMENTOR_SHIFT) | \ ^ This isn't an issue for other Implementor codes, as all the other codes have zero in the top bit and so are representable as a signed int. Cast the implementor code to unsigned in MIDR_CPU_MODEL to remove the undefined behavior. Fixes: 0e5d5ae ("arm64: Add AMPERE1 to the Spectre-BHB affected list") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> Link: https://lore.kernel.org/r/20221102160106.1096948-1-scott@os.amperecomputing.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
1 parent 2081b3b commit 8ec8490

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

arch/arm64/include/asm/cputype.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@
4141
(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
4242

4343
#define MIDR_CPU_MODEL(imp, partnum) \
44-
(((imp) << MIDR_IMPLEMENTOR_SHIFT) | \
44+
((_AT(u32, imp) << MIDR_IMPLEMENTOR_SHIFT) | \
4545
(0xf << MIDR_ARCHITECTURE_SHIFT) | \
4646
((partnum) << MIDR_PARTNUM_SHIFT))
4747

0 commit comments

Comments
 (0)