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Abhinav Kumarlumag
Abhinav Kumar
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lumag
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drm/msm/dpu: introduce separate wb2_format arrays for rgb and yuv
Lets rename the existing wb2_formats array wb2_formats_rgb to indicate that it has only RGB formats and can be used on any chipset having a WB block. Introduce a new wb2_formats_rgb_yuv array to the catalog to indicate support for YUV formats to writeback in addition to RGB. Chipsets which have support for CDM block will use the newly added wb2_formats_rgb_yuv array. changes in v3: - change type of wb2_formats_rgb/wb2_formats_rgb_yuv to u32 to fix checkpatch warnings Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/571837/ Link: https://lore.kernel.org/r/20231212205254.12422-15-quic_abhinavk@quicinc.com [DB: fixed newer catalog entries] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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-15
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8 files changed

+50
-15
lines changed

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -341,8 +341,8 @@ static const struct dpu_wb_cfg sm8650_wb[] = {
341341
.name = "wb_2", .id = WB_2,
342342
.base = 0x65000, .len = 0x2c8,
343343
.features = WB_SM8250_MASK,
344-
.format_list = wb2_formats,
345-
.num_formats = ARRAY_SIZE(wb2_formats),
344+
.format_list = wb2_formats_rgb,
345+
.num_formats = ARRAY_SIZE(wb2_formats_rgb),
346346
.xin_id = 6,
347347
.vbif_idx = VBIF_RT,
348348
.maxlinewidth = 4096,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -336,8 +336,8 @@ static const struct dpu_wb_cfg sm8250_wb[] = {
336336
.name = "wb_2", .id = WB_2,
337337
.base = 0x65000, .len = 0x2c8,
338338
.features = WB_SM8250_MASK,
339-
.format_list = wb2_formats,
340-
.num_formats = ARRAY_SIZE(wb2_formats),
339+
.format_list = wb2_formats_rgb_yuv,
340+
.num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
341341
.clk_ctrl = DPU_CLK_CTRL_WB2,
342342
.xin_id = 6,
343343
.vbif_idx = VBIF_RT,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -157,8 +157,8 @@ static const struct dpu_wb_cfg sc7180_wb[] = {
157157
.name = "wb_2", .id = WB_2,
158158
.base = 0x65000, .len = 0x2c8,
159159
.features = WB_SM8250_MASK,
160-
.format_list = wb2_formats,
161-
.num_formats = ARRAY_SIZE(wb2_formats),
160+
.format_list = wb2_formats_rgb,
161+
.num_formats = ARRAY_SIZE(wb2_formats_rgb),
162162
.clk_ctrl = DPU_CLK_CTRL_WB2,
163163
.xin_id = 6,
164164
.vbif_idx = VBIF_RT,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -303,8 +303,8 @@ static const struct dpu_wb_cfg sm8350_wb[] = {
303303
.name = "wb_2", .id = WB_2,
304304
.base = 0x65000, .len = 0x2c8,
305305
.features = WB_SM8250_MASK,
306-
.format_list = wb2_formats,
307-
.num_formats = ARRAY_SIZE(wb2_formats),
306+
.format_list = wb2_formats_rgb,
307+
.num_formats = ARRAY_SIZE(wb2_formats_rgb),
308308
.clk_ctrl = DPU_CLK_CTRL_WB2,
309309
.xin_id = 6,
310310
.vbif_idx = VBIF_RT,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -169,8 +169,8 @@ static const struct dpu_wb_cfg sc7280_wb[] = {
169169
.name = "wb_2", .id = WB_2,
170170
.base = 0x65000, .len = 0x2c8,
171171
.features = WB_SM8250_MASK,
172-
.format_list = wb2_formats,
173-
.num_formats = ARRAY_SIZE(wb2_formats),
172+
.format_list = wb2_formats_rgb_yuv,
173+
.num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
174174
.clk_ctrl = DPU_CLK_CTRL_WB2,
175175
.xin_id = 6,
176176
.vbif_idx = VBIF_RT,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -321,8 +321,8 @@ static const struct dpu_wb_cfg sm8450_wb[] = {
321321
.name = "wb_2", .id = WB_2,
322322
.base = 0x65000, .len = 0x2c8,
323323
.features = WB_SM8250_MASK,
324-
.format_list = wb2_formats,
325-
.num_formats = ARRAY_SIZE(wb2_formats),
324+
.format_list = wb2_formats_rgb,
325+
.num_formats = ARRAY_SIZE(wb2_formats_rgb),
326326
.clk_ctrl = DPU_CLK_CTRL_WB2,
327327
.xin_id = 6,
328328
.vbif_idx = VBIF_RT,

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -315,8 +315,8 @@ static const struct dpu_wb_cfg sm8550_wb[] = {
315315
.name = "wb_2", .id = WB_2,
316316
.base = 0x65000, .len = 0x2c8,
317317
.features = WB_SM8250_MASK,
318-
.format_list = wb2_formats,
319-
.num_formats = ARRAY_SIZE(wb2_formats),
318+
.format_list = wb2_formats_rgb,
319+
.num_formats = ARRAY_SIZE(wb2_formats_rgb),
320320
.xin_id = 6,
321321
.vbif_idx = VBIF_RT,
322322
.maxlinewidth = 4096,

‎drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

Lines changed: 36 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,7 @@ static const u32 rotation_v2_formats[] = {
202202
/* TODO add formats after validation */
203203
};
204204

205-
static const uint32_t wb2_formats[] = {
205+
static const u32 wb2_formats_rgb[] = {
206206
DRM_FORMAT_RGB565,
207207
DRM_FORMAT_BGR565,
208208
DRM_FORMAT_RGB888,
@@ -236,6 +236,41 @@ static const uint32_t wb2_formats[] = {
236236
DRM_FORMAT_XBGR4444,
237237
};
238238

239+
static const u32 wb2_formats_rgb_yuv[] = {
240+
DRM_FORMAT_RGB565,
241+
DRM_FORMAT_BGR565,
242+
DRM_FORMAT_RGB888,
243+
DRM_FORMAT_ARGB8888,
244+
DRM_FORMAT_RGBA8888,
245+
DRM_FORMAT_ABGR8888,
246+
DRM_FORMAT_XRGB8888,
247+
DRM_FORMAT_RGBX8888,
248+
DRM_FORMAT_XBGR8888,
249+
DRM_FORMAT_ARGB1555,
250+
DRM_FORMAT_RGBA5551,
251+
DRM_FORMAT_XRGB1555,
252+
DRM_FORMAT_RGBX5551,
253+
DRM_FORMAT_ARGB4444,
254+
DRM_FORMAT_RGBA4444,
255+
DRM_FORMAT_RGBX4444,
256+
DRM_FORMAT_XRGB4444,
257+
DRM_FORMAT_BGR565,
258+
DRM_FORMAT_BGR888,
259+
DRM_FORMAT_ABGR8888,
260+
DRM_FORMAT_BGRA8888,
261+
DRM_FORMAT_BGRX8888,
262+
DRM_FORMAT_XBGR8888,
263+
DRM_FORMAT_ABGR1555,
264+
DRM_FORMAT_BGRA5551,
265+
DRM_FORMAT_XBGR1555,
266+
DRM_FORMAT_BGRX5551,
267+
DRM_FORMAT_ABGR4444,
268+
DRM_FORMAT_BGRA4444,
269+
DRM_FORMAT_BGRX4444,
270+
DRM_FORMAT_XBGR4444,
271+
DRM_FORMAT_NV12,
272+
};
273+
239274
/*************************************************************
240275
* SSPP sub blocks config
241276
*************************************************************/

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