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hvilleneuvedoogregkh
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serial: max310x: fail probe if clock crystal is unstable
A stable clock is really required in order to use this UART, so log an error message and bail out if the chip reports that the clock is not stable. Fixes: 4cf9a88 ("serial: max310x: Check the clock readiness") Cc: stable@vger.kernel.org Suggested-by: Jan Kundrát <jan.kundrat@cesnet.cz> Link: https://www.spinics.net/lists/linux-serial/msg35773.html Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Link: https://lore.kernel.org/r/20240116213001.3691629-4-hugo@hugovil.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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drivers/tty/serial/max310x.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -587,7 +587,7 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
587587
return 1;
588588
}
589589

590-
static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
590+
static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
591591
unsigned long freq, bool xtal)
592592
{
593593
unsigned int div, clksrc, pllcfg = 0;
@@ -657,7 +657,8 @@ static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
657657
} while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES));
658658

659659
if (!stable)
660-
dev_warn(dev, "clock is not stable yet\n");
660+
return dev_err_probe(dev, -EAGAIN,
661+
"clock is not stable\n");
661662
}
662663

663664
return bestfreq;
@@ -1282,7 +1283,7 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
12821283
{
12831284
int i, ret, fmin, fmax, freq;
12841285
struct max310x_port *s;
1285-
u32 uartclk = 0;
1286+
s32 uartclk = 0;
12861287
bool xtal;
12871288

12881289
for (i = 0; i < devtype->nr; i++)
@@ -1360,6 +1361,11 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
13601361
}
13611362

13621363
uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
1364+
if (uartclk < 0) {
1365+
ret = uartclk;
1366+
goto out_uart;
1367+
}
1368+
13631369
dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
13641370

13651371
for (i = 0; i < devtype->nr; i++) {

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