@@ -166,6 +166,19 @@ static const struct qusb2_phy_init_tbl ipq5424_init_tbl[] = {
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QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_AUTOPGM_CTL1 , 0x9f ),
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};
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+ static const struct qusb2_phy_init_tbl qcs615_init_tbl [] = {
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+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE1 , 0xc8 ),
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+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE2 , 0xb3 ),
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+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE3 , 0x83 ),
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+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TUNE4 , 0xc0 ),
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+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_TUNE , 0x30 ),
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+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_USER_CTL1 , 0x79 ),
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+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_USER_CTL2 , 0x21 ),
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+ QUSB2_PHY_INIT_CFG_L (QUSB2PHY_PORT_TEST2 , 0x14 ),
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+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_AUTOPGM_CTL1 , 0x9f ),
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+ QUSB2_PHY_INIT_CFG (QUSB2PHY_PLL_PWR_CTRL , 0x00 ),
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+ };
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+
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static const unsigned int ipq6018_regs_layout [] = {
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[QUSB2PHY_PLL_STATUS ] = 0x38 ,
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[QUSB2PHY_PORT_TUNE1 ] = 0x80 ,
@@ -356,6 +369,17 @@ static const struct qusb2_phy_cfg ipq5424_phy_cfg = {
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.autoresume_en = BIT (0 ),
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};
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+ static const struct qusb2_phy_cfg qcs615_phy_cfg = {
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+ .tbl = qcs615_init_tbl ,
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+ .tbl_num = ARRAY_SIZE (qcs615_init_tbl ),
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+ .regs = ipq6018_regs_layout ,
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+
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+ .disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN ),
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+ .mask_core_ready = PLL_LOCKED ,
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+ /* autoresume not used */
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+ .autoresume_en = BIT (0 ),
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+ };
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+
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static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
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.tbl = qusb2_v2_init_tbl ,
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.tbl_num = ARRAY_SIZE (qusb2_v2_init_tbl ),
@@ -950,6 +974,9 @@ static const struct of_device_id qusb2_phy_of_match_table[] = {
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}, {
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.compatible = "qcom,msm8998-qusb2-phy" ,
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.data = & msm8998_phy_cfg ,
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+ }, {
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+ .compatible = "qcom,qcs615-qusb2-phy" ,
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+ .data = & qcs615_phy_cfg ,
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}, {
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.compatible = "qcom,qcm2290-qusb2-phy" ,
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.data = & sm6115_phy_cfg ,
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