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Michael Schmitzdamien-lemoal
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ata: pata_falcon: fix IO base selection for Q40
With commit 44b1fbc ("m68k/q40: Replace q40ide driver with pata_falcon and falconide"), the Q40 IDE driver was replaced by pata_falcon.c. Both IO and memory resources were defined for the Q40 IDE platform device, but definition of the IDE register addresses was modeled after the Falcon case, both in use of the memory resources and in including register shift and byte vs. word offset in the address. This was correct for the Falcon case, which does not apply any address translation to the register addresses. In the Q40 case, all of device base address, byte access offset and register shift is included in the platform specific ISA access translation (in asm/mm_io.h). As a consequence, such address translation gets applied twice, and register addresses are mangled. Use the device base address from the platform IO resource for Q40 (the IO address translation will then add the correct ISA window base address and byte access offset), with register shift 1. Use MMIO base address and register shift 2 as before for Falcon. Encode PIO_OFFSET into IO port addresses for all registers for Q40 except the data transfer register. Encode the MMIO offset there (pata_falcon_data_xfer() directly uses raw IO with no address translation). Reported-by: William R Sowerbutts <will@sowerbutts.com> Closes: https://lore.kernel.org/r/CAMuHMdUU62jjunJh9cqSqHT87B0H0A4udOOPs=WN7WZKpcagVA@mail.gmail.com Link: https://lore.kernel.org/r/CAMuHMdUU62jjunJh9cqSqHT87B0H0A4udOOPs=WN7WZKpcagVA@mail.gmail.com Fixes: 44b1fbc ("m68k/q40: Replace q40ide driver with pata_falcon and falconide") Cc: stable@vger.kernel.org Cc: Finn Thain <fthain@linux-m68k.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: William R Sowerbutts <will@sowerbutts.com> Signed-off-by: Michael Schmitz <schmitzmic@gmail.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
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drivers/ata/pata_falcon.c

Lines changed: 29 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -122,8 +122,8 @@ static int __init pata_falcon_init_one(struct platform_device *pdev)
122122
struct resource *base_res, *ctl_res, *irq_res;
123123
struct ata_host *host;
124124
struct ata_port *ap;
125-
void __iomem *base;
126-
int irq = 0;
125+
void __iomem *base, *ctl_base;
126+
int irq = 0, io_offset = 1, reg_shift = 2; /* Falcon defaults */
127127

128128
dev_info(&pdev->dev, "Atari Falcon and Q40/Q60 PATA controller\n");
129129

@@ -164,26 +164,34 @@ static int __init pata_falcon_init_one(struct platform_device *pdev)
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ap->pio_mask = ATA_PIO4;
165165
ap->flags |= ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
166166

167-
base = (void __iomem *)base_mem_res->start;
168167
/* N.B. this assumes data_addr will be used for word-sized I/O only */
169-
ap->ioaddr.data_addr = base + 0 + 0 * 4;
170-
ap->ioaddr.error_addr = base + 1 + 1 * 4;
171-
ap->ioaddr.feature_addr = base + 1 + 1 * 4;
172-
ap->ioaddr.nsect_addr = base + 1 + 2 * 4;
173-
ap->ioaddr.lbal_addr = base + 1 + 3 * 4;
174-
ap->ioaddr.lbam_addr = base + 1 + 4 * 4;
175-
ap->ioaddr.lbah_addr = base + 1 + 5 * 4;
176-
ap->ioaddr.device_addr = base + 1 + 6 * 4;
177-
ap->ioaddr.status_addr = base + 1 + 7 * 4;
178-
ap->ioaddr.command_addr = base + 1 + 7 * 4;
179-
180-
base = (void __iomem *)ctl_mem_res->start;
181-
ap->ioaddr.altstatus_addr = base + 1;
182-
ap->ioaddr.ctl_addr = base + 1;
183-
184-
ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
185-
(unsigned long)base_mem_res->start,
186-
(unsigned long)ctl_mem_res->start);
168+
ap->ioaddr.data_addr = (void __iomem *)base_mem_res->start;
169+
170+
if (base_res) { /* only Q40 has IO resources */
171+
io_offset = 0x10000;
172+
reg_shift = 0;
173+
base = (void __iomem *)base_res->start;
174+
ctl_base = (void __iomem *)ctl_res->start;
175+
} else {
176+
base = (void __iomem *)base_mem_res->start;
177+
ctl_base = (void __iomem *)ctl_mem_res->start;
178+
}
179+
180+
ap->ioaddr.error_addr = base + io_offset + (1 << reg_shift);
181+
ap->ioaddr.feature_addr = base + io_offset + (1 << reg_shift);
182+
ap->ioaddr.nsect_addr = base + io_offset + (2 << reg_shift);
183+
ap->ioaddr.lbal_addr = base + io_offset + (3 << reg_shift);
184+
ap->ioaddr.lbam_addr = base + io_offset + (4 << reg_shift);
185+
ap->ioaddr.lbah_addr = base + io_offset + (5 << reg_shift);
186+
ap->ioaddr.device_addr = base + io_offset + (6 << reg_shift);
187+
ap->ioaddr.status_addr = base + io_offset + (7 << reg_shift);
188+
ap->ioaddr.command_addr = base + io_offset + (7 << reg_shift);
189+
190+
ap->ioaddr.altstatus_addr = ctl_base + io_offset;
191+
ap->ioaddr.ctl_addr = ctl_base + io_offset;
192+
193+
ata_port_desc(ap, "cmd %px ctl %px data %px",
194+
base, ctl_base, ap->ioaddr.data_addr);
187195

188196
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
189197
if (irq_res && irq_res->start > 0) {

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