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drm/nouveau: bring back blit subchannel for pre nv50 GPUs
1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128 was important as otherwise the GPU spams us with `CACHE_ERROR` messages. We use the blit subchannel inside our vblank handling, so we should keep at least this part. v2: Only do it for NV11+ GPUs Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/201 Fixes: 4a16dd9 ("drm/nouveau/kms: switch to drm fbdev helpers") Signed-off-by: Karol Herbst <kherbst@redhat.com> Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230526091052.2169044-1-kherbst@redhat.com
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3 files changed

+19
-3
lines changed

3 files changed

+19
-3
lines changed

drivers/gpu/drm/nouveau/nouveau_chan.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,7 @@ nouveau_channel_del(struct nouveau_channel **pchan)
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if (cli)
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nouveau_svmm_part(chan->vmm->svmm, chan->inst);
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93+
nvif_object_dtor(&chan->blit);
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nvif_object_dtor(&chan->nvsw);
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nvif_object_dtor(&chan->gart);
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nvif_object_dtor(&chan->vram);

drivers/gpu/drm/nouveau/nouveau_chan.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@ struct nouveau_channel {
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u32 user_put;
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struct nvif_object user;
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struct nvif_object blit;
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struct nvif_event kill;
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atomic_t killed;

drivers/gpu/drm/nouveau/nouveau_drm.c

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -375,15 +375,29 @@ nouveau_accel_gr_init(struct nouveau_drm *drm)
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ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
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NVDRM_NVSW, nouveau_abi16_swclass(drm),
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NULL, 0, &drm->channel->nvsw);
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379+
if (ret == 0 && device->info.chipset >= 0x11) {
380+
ret = nvif_object_ctor(&drm->channel->user, "drmBlit",
381+
0x005f, 0x009f,
382+
NULL, 0, &drm->channel->blit);
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}
384+
378385
if (ret == 0) {
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struct nvif_push *push = drm->channel->chan.push;
380-
ret = PUSH_WAIT(push, 2);
381-
if (ret == 0)
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ret = PUSH_WAIT(push, 8);
388+
if (ret == 0) {
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if (device->info.chipset >= 0x11) {
390+
PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle);
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PUSH_NVSQ(push, NV09F, 0x0120, 0,
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0x0124, 1,
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0x0128, 2);
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}
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PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
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}
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}
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385399
if (ret) {
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NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
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NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret);
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nouveau_accel_gr_fini(drm);
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return;
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}

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