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jhswartztsbogend
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mips: dts: ralink: mt7621: reorder serial0 properties
Reorder serial0 properties according to the guidelines laid out in Documentation/devicetree/bindings/dts-coding-style.rst Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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arch/mips/boot/dts/ralink/mt7621.dtsi

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -115,13 +115,14 @@
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compatible = "ns16550a";
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reg = <0xc00 0x100>;
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118+
reg-io-width = <4>;
119+
reg-shift = <2>;
120+
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clocks = <&sysc MT7621_CLK_UART1>;
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120123
interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
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123-
reg-shift = <2>;
124-
reg-io-width = <4>;
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no-loopback-test;
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pinctrl-names = "default";

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