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Merge branch 'for-v6.13/clk-dt-bindings' into next/clk
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos8895 SoC clock controller
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maintainers:
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- Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
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- Chanwoo Choi <cw00.choi@samsung.com>
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- Krzysztof Kozlowski <krzk@kernel.org>
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description: |
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Exynos8895 clock controller is comprised of several CMU units, generating
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clocks for different domains. Those CMU units are modeled as separate device
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tree nodes, and might depend on each other. The root clock in that root tree
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is an external clock: OSCCLK (26 MHz). This external clock must be defined
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as a fixed-rate clock in dts.
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CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
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dividers; all other clocks of function blocks (other CMUs) are usually
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derived from CMU_TOP.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All clocks available for usage
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in clock consumer nodes are defined as preprocessor macros in
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'include/dt-bindings/clock/samsung,exynos8895.h' header.
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properties:
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compatible:
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enum:
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- samsung,exynos8895-cmu-fsys0
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- samsung,exynos8895-cmu-fsys1
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- samsung,exynos8895-cmu-peric0
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- samsung,exynos8895-cmu-peric1
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- samsung,exynos8895-cmu-peris
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- samsung,exynos8895-cmu-top
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clocks:
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minItems: 1
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maxItems: 16
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clock-names:
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minItems: 1
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maxItems: 16
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"#clock-cells":
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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- "#clock-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-fsys0
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_FSYS0 BUS clock (from CMU_TOP)
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- description: CMU_FSYS0 DPGTC clock (from CMU_TOP)
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- description: CMU_FSYS0 MMC_EMBD clock (from CMU_TOP)
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- description: CMU_FSYS0 UFS_EMBD clock (from CMU_TOP)
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- description: CMU_FSYS0 USBDRD30 clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: dpgtc
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- const: mmc
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- const: ufs
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- const: usbdrd30
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-fsys1
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_FSYS1 BUS clock (from CMU_TOP)
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- description: CMU_FSYS1 PCIE clock (from CMU_TOP)
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- description: CMU_FSYS1 UFS_CARD clock (from CMU_TOP)
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- description: CMU_FSYS1 MMC_CARD clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: pcie
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- const: ufs
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- const: mmc
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-peric0
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_PERIC0 BUS clock (from CMU_TOP)
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- description: CMU_PERIC0 UART_DBG clock (from CMU_TOP)
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- description: CMU_PERIC0 USI00 clock (from CMU_TOP)
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- description: CMU_PERIC0 USI01 clock (from CMU_TOP)
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- description: CMU_PERIC0 USI02 clock (from CMU_TOP)
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- description: CMU_PERIC0 USI03 clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: uart
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- const: usi0
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- const: usi1
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- const: usi2
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- const: usi3
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-peric1
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_PERIC1 BUS clock (from CMU_TOP)
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- description: CMU_PERIC1 SPEEDY2 clock (from CMU_TOP)
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- description: CMU_PERIC1 SPI_CAM0 clock (from CMU_TOP)
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- description: CMU_PERIC1 SPI_CAM1 clock (from CMU_TOP)
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- description: CMU_PERIC1 UART_BT clock (from CMU_TOP)
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- description: CMU_PERIC1 USI04 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI05 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI06 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI07 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI08 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI09 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI10 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI11 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI12 clock (from CMU_TOP)
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- description: CMU_PERIC1 USI13 clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- const: speedy
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- const: cam0
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- const: cam1
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- const: uart
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- const: usi4
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- const: usi5
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- const: usi6
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- const: usi7
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- const: usi8
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- const: usi9
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- const: usi10
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- const: usi11
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- const: usi12
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- const: usi13
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-peris
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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- description: CMU_PERIS BUS clock (from CMU_TOP)
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clock-names:
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items:
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- const: oscclk
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- const: bus
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos8895-cmu-top
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then:
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properties:
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clocks:
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items:
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- description: External reference clock (26 MHz)
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clock-names:
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items:
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- const: oscclk
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/samsung,exynos8895.h>
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cmu_fsys1: clock-controller@11400000 {
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compatible = "samsung,exynos8895-cmu-fsys1";
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reg = <0x11400000 0x8000>;
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#clock-cells = <1>;
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clocks = <&oscclk>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_BUS>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>,
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<&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>;
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clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
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};
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...

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