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mtd: spi-nor: spansion: add MCP support in set_octal_dtr()
Infineon multi-chip package (MCP) devices require the Octal DTR configuraion to be set on each die. We can access to configuration registers in each die by using params->n_dice and params->vreg_offset[] populated from SFDP. Add MCP support in set_octal_dtr(). Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20230726075257.12985-7-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
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drivers/mtd/spi-nor/spansion.c

Lines changed: 19 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -204,17 +204,19 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
204204
const struct spi_nor_flash_parameter *params = nor->params;
205205
u8 *buf = nor->bouncebuf;
206206
u64 addr;
207-
int ret;
207+
int i, ret;
208208

209-
addr = params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR2;
210-
ret = cypress_nor_set_memlat(nor, addr);
211-
if (ret)
212-
return ret;
209+
for (i = 0; i < params->n_dice; i++) {
210+
addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR2;
211+
ret = cypress_nor_set_memlat(nor, addr);
212+
if (ret)
213+
return ret;
213214

214-
addr = params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5;
215-
ret = cypress_nor_set_octal_dtr_bits(nor, addr);
216-
if (ret)
217-
return ret;
215+
addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR5;
216+
ret = cypress_nor_set_octal_dtr_bits(nor, addr);
217+
if (ret)
218+
return ret;
219+
}
218220

219221
/* Read flash ID to make sure the switch was successful. */
220222
ret = spi_nor_read_id(nor, nor->addr_nbytes, 3, buf,
@@ -249,14 +251,17 @@ static int cypress_nor_set_single_spi_bits(struct spi_nor *nor, u64 addr)
249251

250252
static int cypress_nor_octal_dtr_dis(struct spi_nor *nor)
251253
{
254+
const struct spi_nor_flash_parameter *params = nor->params;
252255
u8 *buf = nor->bouncebuf;
253256
u64 addr;
254-
int ret;
257+
int i, ret;
255258

256-
addr = nor->params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5;
257-
ret = cypress_nor_set_single_spi_bits(nor, addr);
258-
if (ret)
259-
return ret;
259+
for (i = 0; i < params->n_dice; i++) {
260+
addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR5;
261+
ret = cypress_nor_set_single_spi_bits(nor, addr);
262+
if (ret)
263+
return ret;
264+
}
260265

261266
/* Read flash ID to make sure the switch was successful. */
262267
ret = spi_nor_read_id(nor, 0, 0, buf, SNOR_PROTO_1_1_1);

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