Skip to content

Commit 7c834a7

Browse files
committed
ASoC: codecs: fix ES8326 performance and pop noise
Merge series from Zhu Ning <zhuning0077@gmail.com>: We get some issues regarding crosstalk, THD+N performance and pop noise from customer's project.
2 parents c481016 + 8c99a0a commit 7c834a7

File tree

2 files changed

+141
-48
lines changed

2 files changed

+141
-48
lines changed

sound/soc/codecs/es8326.c

Lines changed: 139 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,82 @@ struct es8326_priv {
4545
int jack_remove_retry;
4646
};
4747

48+
static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
49+
struct snd_ctl_elem_value *ucontrol)
50+
{
51+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
52+
struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
53+
unsigned int crosstalk_h, crosstalk_l;
54+
unsigned int crosstalk;
55+
56+
regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
57+
regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
58+
crosstalk_h &= 0x20;
59+
crosstalk_l &= 0xf0;
60+
crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;
61+
ucontrol->value.integer.value[0] = crosstalk;
62+
63+
return 0;
64+
}
65+
66+
static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
67+
struct snd_ctl_elem_value *ucontrol)
68+
{
69+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
70+
struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
71+
unsigned int crosstalk_h, crosstalk_l;
72+
unsigned int crosstalk;
73+
74+
crosstalk = ucontrol->value.integer.value[0];
75+
regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
76+
crosstalk_h = (crosstalk & 0x10) << 1;
77+
crosstalk_l &= 0x0f;
78+
crosstalk_l |= (crosstalk & 0x0f) << 4;
79+
regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
80+
0x20, crosstalk_h);
81+
regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
82+
83+
return 0;
84+
}
85+
86+
static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
87+
struct snd_ctl_elem_value *ucontrol)
88+
{
89+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
90+
struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
91+
unsigned int crosstalk_h, crosstalk_l;
92+
unsigned int crosstalk;
93+
94+
regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
95+
regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
96+
crosstalk_h &= 0x10;
97+
crosstalk_l &= 0x0f;
98+
crosstalk = crosstalk_h | crosstalk_l;
99+
ucontrol->value.integer.value[0] = crosstalk;
100+
101+
return 0;
102+
}
103+
104+
static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
105+
struct snd_ctl_elem_value *ucontrol)
106+
{
107+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
108+
struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
109+
unsigned int crosstalk_h, crosstalk_l;
110+
unsigned int crosstalk;
111+
112+
crosstalk = ucontrol->value.integer.value[0];
113+
regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
114+
crosstalk_h = crosstalk & 0x10;
115+
crosstalk_l &= 0xf0;
116+
crosstalk_l |= crosstalk & 0x0f;
117+
regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
118+
0x10, crosstalk_h);
119+
regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
120+
121+
return 0;
122+
}
123+
48124
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
49125
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
50126
static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
@@ -102,6 +178,10 @@ static const struct snd_kcontrol_new es8326_snd_controls[] = {
102178
SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
103179
0, 0x0f, 0, drc_target_tlv),
104180

181+
SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
182+
es8326_crosstalk1_get, es8326_crosstalk1_set),
183+
SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
184+
es8326_crosstalk2_get, es8326_crosstalk2_set),
105185
};
106186

107187
static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
@@ -117,12 +197,6 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
117197
SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
118198
SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
119199

120-
/* ADC Digital Mute */
121-
SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0),
122-
SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0),
123-
SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0),
124-
SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0),
125-
126200
/* Analog Power Supply*/
127201
SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
128202
SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
@@ -142,15 +216,10 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
142216
};
143217

144218
static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
145-
{"ADC L1", NULL, "MIC1"},
146-
{"ADC R1", NULL, "MIC2"},
147-
{"ADC L2", NULL, "MIC3"},
148-
{"ADC R2", NULL, "MIC4"},
149-
150-
{"ADC L", NULL, "ADC L1"},
151-
{"ADC R", NULL, "ADC R1"},
152-
{"ADC L", NULL, "ADC L2"},
153-
{"ADC R", NULL, "ADC R2"},
219+
{"ADC L", NULL, "MIC1"},
220+
{"ADC R", NULL, "MIC2"},
221+
{"ADC L", NULL, "MIC3"},
222+
{"ADC R", NULL, "MIC4"},
154223

155224
{"I2S OUT", NULL, "ADC L"},
156225
{"I2S OUT", NULL, "ADC R"},
@@ -440,10 +509,16 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
440509
unsigned int offset_l, offset_r;
441510

442511
if (mute) {
443-
regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
444-
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
445-
ES8326_MUTE_MASK, ES8326_MUTE);
446-
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0);
512+
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
513+
regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
514+
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
515+
ES8326_MUTE_MASK, ES8326_MUTE);
516+
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
517+
0x30, 0x00);
518+
} else {
519+
regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
520+
0x0F, 0x0F);
521+
}
447522
} else {
448523
if (!es8326->calibrated) {
449524
regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
@@ -456,11 +531,22 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
456531
regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
457532
es8326->calibrated = true;
458533
}
459-
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
460-
regmap_write(es8326->regmap, ES8326_HP_VOL, 0x91);
461-
regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
462-
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
463-
ES8326_MUTE_MASK, ~(ES8326_MUTE));
534+
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
535+
regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
536+
usleep_range(1000, 5000);
537+
regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
538+
usleep_range(1000, 5000);
539+
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
540+
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
541+
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
542+
regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
543+
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
544+
ES8326_MUTE_MASK, ~(ES8326_MUTE));
545+
} else {
546+
msleep(300);
547+
regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
548+
0x0F, 0x00);
549+
}
464550
}
465551
return 0;
466552
}
@@ -477,23 +563,20 @@ static int es8326_set_bias_level(struct snd_soc_component *codec,
477563
if (ret)
478564
return ret;
479565

480-
regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
566+
regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
567+
usleep_range(5000, 10000);
481568
regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
482569
regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
483570
(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
484-
regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
485571
regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
486572
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
487573
regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);
488-
489-
regmap_update_bits(es8326->regmap, ES8326_RESET,
490-
ES8326_CSM_ON, ES8326_CSM_ON);
574+
regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
491575
break;
492576
case SND_SOC_BIAS_PREPARE:
493577
break;
494578
case SND_SOC_BIAS_STANDBY:
495579
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
496-
regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00);
497580
regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
498581
regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
499582
break;
@@ -513,7 +596,7 @@ static const struct snd_soc_dai_ops es8326_ops = {
513596
.set_fmt = es8326_set_dai_fmt,
514597
.set_sysclk = es8326_set_dai_sysclk,
515598
.mute_stream = es8326_mute,
516-
.no_capture_mute = 1,
599+
.no_capture_mute = 0,
517600
};
518601

519602
static struct snd_soc_dai_driver es8326_dai = {
@@ -672,6 +755,8 @@ static void es8326_jack_detect_handler(struct work_struct *work)
672755
es8326->hp = 0;
673756
}
674757
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
758+
regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
759+
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
675760
/*
676761
* Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
677762
*/
@@ -695,8 +780,11 @@ static void es8326_jack_detect_handler(struct work_struct *work)
695780
* Don't report jack status.
696781
*/
697782
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
783+
es8326_enable_micbias(es8326->component);
698784
usleep_range(50000, 70000);
699785
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
786+
regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
787+
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);
700788
queue_delayed_work(system_wq, &es8326->jack_detect_work,
701789
msecs_to_jiffies(400));
702790
es8326->hp = 1;
@@ -736,13 +824,10 @@ static void es8326_jack_detect_handler(struct work_struct *work)
736824
static irqreturn_t es8326_irq(int irq, void *dev_id)
737825
{
738826
struct es8326_priv *es8326 = dev_id;
739-
struct snd_soc_component *comp = es8326->component;
740827

741828
if (!es8326->jack)
742829
goto out;
743830

744-
es8326_enable_micbias(comp);
745-
746831
if (es8326->jack->status & SND_JACK_HEADSET)
747832
queue_delayed_work(system_wq, &es8326->jack_detect_work,
748833
msecs_to_jiffies(10));
@@ -766,14 +851,14 @@ static int es8326_calibrate(struct snd_soc_component *component)
766851
if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {
767852
dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
768853
regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
769-
regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01);
854+
regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
770855
regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
771856
regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
772857
regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
773858
regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
774859
regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
775860
regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
776-
regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);
861+
regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
777862
regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
778863
usleep_range(15000, 20000);
779864
regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
@@ -814,28 +899,29 @@ static int es8326_resume(struct snd_soc_component *component)
814899
/* reset internal clock state */
815900
regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
816901
regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
902+
regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
817903
usleep_range(10000, 15000);
818904
regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9);
819-
regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4b);
905+
regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb);
820906
/* set headphone default type and detect pin */
821907
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
822908
regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
823-
regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
824909

825910
/* set internal oscillator as clock source of headpone cp */
826911
regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
827912
regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);
828913
/* clock manager reset release */
829914
regmap_write(es8326->regmap, ES8326_RESET, 0x17);
830915
/* set headphone detection as half scan mode */
831-
regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
916+
regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
832917
regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
833918

834919
/* enable headphone driver */
920+
regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
835921
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
836922
usleep_range(2000, 5000);
837-
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xa3);
838-
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xb3);
923+
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
924+
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
839925
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
840926

841927
regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
@@ -844,6 +930,8 @@ static int es8326_resume(struct snd_soc_component *component)
844930
regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
845931
/* calibrate for B version */
846932
es8326_calibrate(component);
933+
regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
934+
regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
847935
/* turn off headphone out */
848936
regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
849937
/* set ADC and DAC in low power mode */
@@ -856,6 +944,14 @@ static int es8326_resume(struct snd_soc_component *component)
856944
regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
857945
regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
858946

947+
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
948+
((es8326->version == ES8326_VERSION_B) ?
949+
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
950+
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
951+
usleep_range(5000, 10000);
952+
es8326_enable_micbias(es8326->component);
953+
usleep_range(50000, 70000);
954+
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
859955
regmap_write(es8326->regmap, ES8326_INT_SOURCE,
860956
(ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
861957
regmap_write(es8326->regmap, ES8326_INTOUT_IO,
@@ -864,19 +960,15 @@ static int es8326_resume(struct snd_soc_component *component)
864960
(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
865961
regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
866962

867-
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
963+
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
868964
regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
869965
regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
870966
ES8326_MIC1_SEL);
871967

872968
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
873969
ES8326_MUTE);
874970

875-
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
876-
((es8326->version == ES8326_VERSION_B) ?
877-
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
878-
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
879-
regmap_write(es8326->regmap, ES8326_HP_VOL, 0x11);
971+
regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);
880972

881973
es8326->jack_remove_retry = 0;
882974
es8326->hp = 0;

sound/soc/codecs/es8326.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,7 @@
7272
#define ES8326_DAC_VOL 0x50
7373
#define ES8326_DRC_RECOVERY 0x53
7474
#define ES8326_DRC_WINSIZE 0x54
75+
#define ES8326_DAC_CROSSTALK 0x55
7576
#define ES8326_HPJACK_TIMER 0x56
7677
#define ES8326_HPDET_TYPE 0x57
7778
#define ES8326_INT_SOURCE 0x58
@@ -100,7 +101,7 @@
100101
#define ES8326_MUTE (3 << 0)
101102

102103
/* ES8326_CLK_CTL */
103-
#define ES8326_CLK_ON (0x7f << 0)
104+
#define ES8326_CLK_ON (0x7e << 0)
104105
#define ES8326_CLK_OFF (0 << 0)
105106

106107
/* ES8326_CLK_INV */

0 commit comments

Comments
 (0)