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Merge tag 'soc-fixes-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC fixes from Arnd Bergmann: "The main changes are once more for the NXP i.MX platform, addressing multiple regressions in recent devicetree updates for the i.MX8MM and i.MX6ULL SoCs, a PCIe fix for i.MX9 and a MAINTAINERS file update to disambiguate NXP i.MX SoCs from Sony IMX image sensors. The stm32 platform devicetree files get some compatibility fixes for the interrupt controller node. Another compatibility fix is done for the Arm Morello platform's cache controller node. The code changes are all for firmware drivers, fixing kernel-side bugs on the Arm FF-A and SCMI drivers" * tag 'soc-fixes-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp23 SoCs arm64: dts: st: Adjust interrupt-controller for stm32mp23 SoCs arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp21 SoCs arm64: dts: st: Adjust interrupt-controller for stm32mp21 SoCs arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp25 SoCs arm64: dts: st: Adjust interrupt-controller for stm32mp25 SoCs arm64: dts: imx8mm-verdin: Link reg_usdhc2_vqmmc to usdhc2 MAINTAINERS: add exclude for dt-bindings to imx entry ARM: dts: opos6ul: add ksz8081 phy properties arm64: dts: imx95: Correct the range of PCIe app-reg region arm64: dts: imx8mp: configure GPU and NPU clocks in nominal DTSI arm64: dts: morello: Fix-up cache nodes firmware: arm_ffa: Skip Rx buffer ownership release if not acquired firmware: arm_scmi: Fix timeout checks on polling path firmware: arm_scmi: Balance device refcount when destroying devices
2 parents 92a09c4 + 2ef5c66 commit 7b26feb

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12 files changed

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-40
lines changed

12 files changed

+90
-40
lines changed

‎MAINTAINERS

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2519,6 +2519,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
25192519
F: arch/arm/boot/dts/nxp/imx/
25202520
F: arch/arm/boot/dts/nxp/mxs/
25212521
F: arch/arm64/boot/dts/freescale/
2522+
X: Documentation/devicetree/bindings/media/i2c/
25222523
X: arch/arm64/boot/dts/freescale/fsl-*
25232524
X: arch/arm64/boot/dts/freescale/qoriq-*
25242525
X: drivers/media/i2c/

‎arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,9 @@
4040
reg = <1>;
4141
interrupt-parent = <&gpio4>;
4242
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
43+
micrel,led-mode = <1>;
44+
clocks = <&clks IMX6UL_CLK_ENET_REF>;
45+
clock-names = "rmii-ref";
4346
status = "okay";
4447
};
4548
};

‎arch/arm64/boot/dts/arm/morello.dtsi

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@
4444
next-level-cache = <&l2_0>;
4545
clocks = <&scmi_dvfs 0>;
4646

47-
l2_0: l2-cache-0 {
47+
l2_0: l2-cache {
4848
compatible = "cache";
4949
cache-level = <2>;
5050
/* 8 ways set associative */
@@ -53,13 +53,6 @@
5353
cache-sets = <2048>;
5454
cache-unified;
5555
next-level-cache = <&l3_0>;
56-
57-
l3_0: l3-cache {
58-
compatible = "cache";
59-
cache-level = <3>;
60-
cache-size = <0x100000>;
61-
cache-unified;
62-
};
6356
};
6457
};
6558

@@ -78,7 +71,7 @@
7871
next-level-cache = <&l2_1>;
7972
clocks = <&scmi_dvfs 0>;
8073

81-
l2_1: l2-cache-1 {
74+
l2_1: l2-cache {
8275
compatible = "cache";
8376
cache-level = <2>;
8477
/* 8 ways set associative */
@@ -105,7 +98,7 @@
10598
next-level-cache = <&l2_2>;
10699
clocks = <&scmi_dvfs 1>;
107100

108-
l2_2: l2-cache-2 {
101+
l2_2: l2-cache {
109102
compatible = "cache";
110103
cache-level = <2>;
111104
/* 8 ways set associative */
@@ -132,7 +125,7 @@
132125
next-level-cache = <&l2_3>;
133126
clocks = <&scmi_dvfs 1>;
134127

135-
l2_3: l2-cache-3 {
128+
l2_3: l2-cache {
136129
compatible = "cache";
137130
cache-level = <2>;
138131
/* 8 ways set associative */
@@ -143,6 +136,13 @@
143136
next-level-cache = <&l3_0>;
144137
};
145138
};
139+
140+
l3_0: l3-cache {
141+
compatible = "cache";
142+
cache-level = <3>;
143+
cache-size = <0x100000>;
144+
cache-unified;
145+
};
146146
};
147147

148148
firmware {

‎arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi

Lines changed: 20 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -144,6 +144,19 @@
144144
startup-delay-us = <20000>;
145145
};
146146

147+
reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
148+
compatible = "regulator-gpio";
149+
pinctrl-names = "default";
150+
pinctrl-0 = <&pinctrl_usdhc2_vsel>;
151+
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
152+
regulator-max-microvolt = <3300000>;
153+
regulator-min-microvolt = <1800000>;
154+
states = <1800000 0x1>,
155+
<3300000 0x0>;
156+
regulator-name = "PMIC_USDHC_VSELECT";
157+
vin-supply = <&reg_nvcc_sd>;
158+
};
159+
147160
reserved-memory {
148161
#address-cells = <2>;
149162
#size-cells = <2>;
@@ -269,7 +282,7 @@
269282
"SODIMM_19",
270283
"",
271284
"",
272-
"",
285+
"PMIC_USDHC_VSELECT",
273286
"",
274287
"",
275288
"",
@@ -785,6 +798,7 @@
785798
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
786799
pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;
787800
vmmc-supply = <&reg_usdhc2_vmmc>;
801+
vqmmc-supply = <&reg_usdhc2_vqmmc>;
788802
};
789803

790804
&wdog1 {
@@ -1206,13 +1220,17 @@
12061220
<MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 0x6>; /* SODIMM 76 */
12071221
};
12081222

1223+
pinctrl_usdhc2_vsel: usdhc2vselgrp {
1224+
fsl,pins =
1225+
<MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x10>; /* PMIC_USDHC_VSELECT */
1226+
};
1227+
12091228
/*
12101229
* Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the
12111230
* on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.
12121231
*/
12131232
pinctrl_usdhc2: usdhc2grp {
12141233
fsl,pins =
1215-
<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
12161234
<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90>, /* SODIMM 78 */
12171235
<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x90>, /* SODIMM 74 */
12181236
<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x90>, /* SODIMM 80 */
@@ -1223,7 +1241,6 @@
12231241

12241242
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
12251243
fsl,pins =
1226-
<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
12271244
<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94>,
12281245
<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x94>,
12291246
<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x94>,
@@ -1234,7 +1251,6 @@
12341251

12351252
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
12361253
fsl,pins =
1237-
<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
12381254
<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96>,
12391255
<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x96>,
12401256
<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x96>,
@@ -1246,7 +1262,6 @@
12461262
/* Avoid backfeeding with removed card power */
12471263
pinctrl_usdhc2_sleep: usdhc2slpgrp {
12481264
fsl,pins =
1249-
<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x0>,
12501265
<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x0>,
12511266
<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x0>,
12521267
<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0>,

‎arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,20 @@
2424
fsl,operating-mode = "nominal";
2525
};
2626

27+
&gpu2d {
28+
assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
29+
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
30+
assigned-clock-rates = <800000000>;
31+
};
32+
33+
&gpu3d {
34+
assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
35+
<&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
36+
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
37+
<&clk IMX8MP_SYS_PLL1_800M>;
38+
assigned-clock-rates = <800000000>, <800000000>;
39+
};
40+
2741
&pgc_hdmimix {
2842
assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,
2943
<&clk IMX8MP_CLK_HDMI_APB>;
@@ -46,6 +60,18 @@
4660
assigned-clock-rates = <600000000>, <300000000>;
4761
};
4862

63+
&pgc_mlmix {
64+
assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
65+
<&clk IMX8MP_CLK_ML_AXI>,
66+
<&clk IMX8MP_CLK_ML_AHB>;
67+
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
68+
<&clk IMX8MP_SYS_PLL1_800M>,
69+
<&clk IMX8MP_SYS_PLL1_800M>;
70+
assigned-clock-rates = <800000000>,
71+
<800000000>,
72+
<300000000>;
73+
};
74+
4975
&media_blk_ctrl {
5076
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
5177
<&clk IMX8MP_CLK_MEDIA_APB>,

‎arch/arm64/boot/dts/freescale/imx95.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1626,7 +1626,7 @@
16261626
reg = <0 0x4c300000 0 0x10000>,
16271627
<0 0x60100000 0 0xfe00000>,
16281628
<0 0x4c360000 0 0x10000>,
1629-
<0 0x4c340000 0 0x2000>;
1629+
<0 0x4c340000 0 0x4000>;
16301630
reg-names = "dbi", "config", "atu", "app";
16311631
ranges = <0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000>,
16321632
<0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x10000000>;
@@ -1673,7 +1673,7 @@
16731673
reg = <0 0x4c300000 0 0x10000>,
16741674
<0 0x4c360000 0 0x1000>,
16751675
<0 0x4c320000 0 0x1000>,
1676-
<0 0x4c340000 0 0x2000>,
1676+
<0 0x4c340000 0 0x4000>,
16771677
<0 0x4c370000 0 0x10000>,
16781678
<0x9 0 1 0>;
16791679
reg-names = "dbi","atu", "dbi2", "app", "dma", "addr_space";
@@ -1700,7 +1700,7 @@
17001700
reg = <0 0x4c380000 0 0x10000>,
17011701
<8 0x80100000 0 0xfe00000>,
17021702
<0 0x4c3e0000 0 0x10000>,
1703-
<0 0x4c3c0000 0 0x2000>;
1703+
<0 0x4c3c0000 0 0x4000>;
17041704
reg-names = "dbi", "config", "atu", "app";
17051705
ranges = <0x81000000 0 0x00000000 0x8 0x8ff00000 0 0x00100000>,
17061706
<0x82000000 0 0x10000000 0xa 0x10000000 0 0x10000000>;
@@ -1749,7 +1749,7 @@
17491749
reg = <0 0x4c380000 0 0x10000>,
17501750
<0 0x4c3e0000 0 0x1000>,
17511751
<0 0x4c3a0000 0 0x1000>,
1752-
<0 0x4c3c0000 0 0x2000>,
1752+
<0 0x4c3c0000 0 0x4000>,
17531753
<0 0x4c3f0000 0 0x10000>,
17541754
<0xa 0 1 0>;
17551755
reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";

‎arch/arm64/boot/dts/st/stm32mp211.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -116,11 +116,11 @@
116116
};
117117

118118
intc: interrupt-controller@4ac10000 {
119-
compatible = "arm,cortex-a7-gic";
119+
compatible = "arm,gic-400";
120120
reg = <0x4ac10000 0x0 0x1000>,
121-
<0x4ac20000 0x0 0x2000>,
122-
<0x4ac40000 0x0 0x2000>,
123-
<0x4ac60000 0x0 0x2000>;
121+
<0x4ac20000 0x0 0x20000>,
122+
<0x4ac40000 0x0 0x20000>,
123+
<0x4ac60000 0x0 0x20000>;
124124
#interrupt-cells = <3>;
125125
interrupt-controller;
126126
};

‎arch/arm64/boot/dts/st/stm32mp231.dtsi

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1201,13 +1201,12 @@
12011201
};
12021202

12031203
intc: interrupt-controller@4ac10000 {
1204-
compatible = "arm,cortex-a7-gic";
1204+
compatible = "arm,gic-400";
12051205
reg = <0x4ac10000 0x1000>,
1206-
<0x4ac20000 0x2000>,
1207-
<0x4ac40000 0x2000>,
1208-
<0x4ac60000 0x2000>;
1206+
<0x4ac20000 0x20000>,
1207+
<0x4ac40000 0x20000>,
1208+
<0x4ac60000 0x20000>;
12091209
#interrupt-cells = <3>;
1210-
#address-cells = <1>;
12111210
interrupt-controller;
12121211
};
12131212
};

‎arch/arm64/boot/dts/st/stm32mp251.dtsi

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -115,14 +115,13 @@
115115
};
116116

117117
intc: interrupt-controller@4ac00000 {
118-
compatible = "arm,cortex-a7-gic";
118+
compatible = "arm,gic-400";
119119
#interrupt-cells = <3>;
120-
#address-cells = <1>;
121120
interrupt-controller;
122121
reg = <0x0 0x4ac10000 0x0 0x1000>,
123-
<0x0 0x4ac20000 0x0 0x2000>,
124-
<0x0 0x4ac40000 0x0 0x2000>,
125-
<0x0 0x4ac60000 0x0 0x2000>;
122+
<0x0 0x4ac20000 0x0 0x20000>,
123+
<0x0 0x4ac40000 0x0 0x20000>,
124+
<0x0 0x4ac60000 0x0 0x20000>;
126125
};
127126

128127
psci {

‎drivers/firmware/arm_ffa/driver.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -299,7 +299,8 @@ __ffa_partition_info_get(u32 uuid0, u32 uuid1, u32 uuid2, u32 uuid3,
299299
import_uuid(&buf->uuid, (u8 *)&rx_buf->uuid);
300300
}
301301

302-
ffa_rx_release();
302+
if (!(flags & PARTITION_INFO_GET_RETURN_COUNT_ONLY))
303+
ffa_rx_release();
303304

304305
mutex_unlock(&drv_info->rx_lock);
305306

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