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torvaldstorvalds
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Merge tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Weekly fixes, mostly from the end of last week, this week was very quiet, maybe you scared everyone away. It's mostly amdgpu, and xe, with some i915, adp and bridge bits, since I think this is overly quiet I'd expect rc2 to be a bit more lively. bridge: - tda998x: Select CONFIG_DRM_KMS_HELPER amdgpu: - Guard against potential division by 0 in fan code - Zero RPM support for SMU 14.0.2 - Properly handle SI and CIK support being disabled - PSR fixes - DML2 fixes - DP Link training fix - Vblank fixes - RAS fixes - Partitioning fix - SDMA fix - SMU 13.0.x fixes - Rom fetching fix - MES fixes - Queue reset fix xe: - Fix NULL pointer dereference on error path - Add missing HW workaround for BMG - Fix survivability mode not triggering - Fix build warning when DRM_FBDEV_EMULATION is not set i915: - Bounds check for scalers in DSC prefill latency computation - Fix build by adding a missing include adp: - Fix error handling in plane setup" # -----BEGIN PGP SIGNATURE----- * tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel: (34 commits) drm/i2c: tda998x: select CONFIG_DRM_KMS_HELPER drm/amdgpu/gfx12: fix num_mec drm/amdgpu/gfx11: fix num_mec drm/amd/pm: Add gpu_metrics_v1_8 drm/amdgpu: Prefer shadow rom when available drm/amd/pm: Update smu metrics table for smu_v13_0_6 drm/amd/pm: Remove host limit metrics support Remove unnecessary firmware version check for gc v9_4_2 drm/amdgpu: stop unmapping MQD for kernel queues v3 Revert "drm/amdgpu/sdma_v4_4_2: update VM flush implementation for SDMA" drm/amdgpu: Parse all deferred errors with UMC aca handle drm/amdgpu: Update ta ras block drm/amdgpu: Add NPS2 to DPX compatible mode drm/amdgpu: Use correct gfx deferred error count drm/amd/display: Actually do immediate vblank disable drm/amd/display: prevent hang on link training fail Revert "drm/amd/display: dml2 soc dscclk use DPM table clk setting" drm/amd/display: Increase vblank offdelay for PSR panels drm/amd: Handle being compiled without SI or CIK support better drm/amd/pm: Add zero RPM enabled OD setting support for SMU14.0.2 ...
2 parents 56f9445 + e2cb28e commit 758e4c8

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52 files changed

+539
-703
lines changed

‎drivers/gpu/drm/adp/adp_drv.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -232,9 +232,9 @@ static struct drm_plane *adp_plane_new(struct adp_drv_private *adp)
232232
ALL_CRTCS, &adp_plane_funcs,
233233
plane_formats, ARRAY_SIZE(plane_formats),
234234
NULL, DRM_PLANE_TYPE_PRIMARY, "plane");
235-
if (!plane) {
235+
if (IS_ERR(plane)) {
236236
drm_err(drm, "failed to allocate plane");
237-
return ERR_PTR(-ENOMEM);
237+
return plane;
238238
}
239239

240240
drm_plane_helper_add(plane, &adp_plane_helper_funcs);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -195,6 +195,10 @@ static bool aca_bank_is_valid(struct aca_handle *handle, struct aca_bank *bank,
195195
{
196196
const struct aca_bank_ops *bank_ops = handle->bank_ops;
197197

198+
/* Parse all deferred errors with UMC aca handle */
199+
if (ACA_BANK_ERR_IS_DEFFERED(bank))
200+
return handle->hwip == ACA_HWIP_TYPE_UMC;
201+
198202
if (!aca_bank_hwip_is_matched(bank, handle->hwip))
199203
return false;
200204

‎drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -80,14 +80,6 @@ struct ras_query_context;
8080
(ACA_REG__STATUS__POISON((bank)->regs[ACA_REG_IDX_STATUS]) || \
8181
ACA_REG__STATUS__DEFERRED((bank)->regs[ACA_REG_IDX_STATUS]))
8282

83-
#define ACA_BANK_ERR_CE_DE_DECODE(bank) \
84-
(ACA_BANK_ERR_IS_DEFFERED(bank) ? ACA_ERROR_TYPE_DEFERRED : \
85-
ACA_ERROR_TYPE_CE)
86-
87-
#define ACA_BANK_ERR_UE_DE_DECODE(bank) \
88-
(ACA_BANK_ERR_IS_DEFFERED(bank) ? ACA_ERROR_TYPE_DEFERRED : \
89-
ACA_ERROR_TYPE_UE)
90-
9183
enum aca_reg_idx {
9284
ACA_REG_IDX_CTL = 0,
9385
ACA_REG_IDX_STATUS = 1,

‎drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

Lines changed: 27 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -447,6 +447,13 @@ static bool amdgpu_get_bios_apu(struct amdgpu_device *adev)
447447
return true;
448448
}
449449

450+
static bool amdgpu_prefer_rom_resource(struct amdgpu_device *adev)
451+
{
452+
struct resource *res = &adev->pdev->resource[PCI_ROM_RESOURCE];
453+
454+
return (res->flags & IORESOURCE_ROM_SHADOW);
455+
}
456+
450457
static bool amdgpu_get_bios_dgpu(struct amdgpu_device *adev)
451458
{
452459
if (amdgpu_atrm_get_bios(adev)) {
@@ -465,14 +472,27 @@ static bool amdgpu_get_bios_dgpu(struct amdgpu_device *adev)
465472
goto success;
466473
}
467474

468-
if (amdgpu_read_platform_bios(adev)) {
469-
dev_info(adev->dev, "Fetched VBIOS from platform\n");
470-
goto success;
471-
}
475+
if (amdgpu_prefer_rom_resource(adev)) {
476+
if (amdgpu_read_bios(adev)) {
477+
dev_info(adev->dev, "Fetched VBIOS from ROM BAR\n");
478+
goto success;
479+
}
472480

473-
if (amdgpu_read_bios(adev)) {
474-
dev_info(adev->dev, "Fetched VBIOS from ROM BAR\n");
475-
goto success;
481+
if (amdgpu_read_platform_bios(adev)) {
482+
dev_info(adev->dev, "Fetched VBIOS from platform\n");
483+
goto success;
484+
}
485+
486+
} else {
487+
if (amdgpu_read_platform_bios(adev)) {
488+
dev_info(adev->dev, "Fetched VBIOS from platform\n");
489+
goto success;
490+
}
491+
492+
if (amdgpu_read_bios(adev)) {
493+
dev_info(adev->dev, "Fetched VBIOS from ROM BAR\n");
494+
goto success;
495+
}
476496
}
477497

478498
if (amdgpu_read_bios_from_rom(adev)) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 24 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1809,7 +1809,6 @@ static const u16 amdgpu_unsupported_pciidlist[] = {
18091809
};
18101810

18111811
static const struct pci_device_id pciidlist[] = {
1812-
#ifdef CONFIG_DRM_AMDGPU_SI
18131812
{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
18141813
{0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
18151814
{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
@@ -1882,8 +1881,6 @@ static const struct pci_device_id pciidlist[] = {
18821881
{0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
18831882
{0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
18841883
{0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1885-
#endif
1886-
#ifdef CONFIG_DRM_AMDGPU_CIK
18871884
/* Kaveri */
18881885
{0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
18891886
{0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
@@ -1966,7 +1963,6 @@ static const struct pci_device_id pciidlist[] = {
19661963
{0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
19671964
{0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
19681965
{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1969-
#endif
19701966
/* topaz */
19711967
{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
19721968
{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
@@ -2313,40 +2309,48 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
23132309
return -ENOTSUPP;
23142310
}
23152311

2312+
switch (flags & AMD_ASIC_MASK) {
2313+
case CHIP_TAHITI:
2314+
case CHIP_PITCAIRN:
2315+
case CHIP_VERDE:
2316+
case CHIP_OLAND:
2317+
case CHIP_HAINAN:
23162318
#ifdef CONFIG_DRM_AMDGPU_SI
2317-
if (!amdgpu_si_support) {
2318-
switch (flags & AMD_ASIC_MASK) {
2319-
case CHIP_TAHITI:
2320-
case CHIP_PITCAIRN:
2321-
case CHIP_VERDE:
2322-
case CHIP_OLAND:
2323-
case CHIP_HAINAN:
2319+
if (!amdgpu_si_support) {
23242320
dev_info(&pdev->dev,
23252321
"SI support provided by radeon.\n");
23262322
dev_info(&pdev->dev,
23272323
"Use radeon.si_support=0 amdgpu.si_support=1 to override.\n"
23282324
);
23292325
return -ENODEV;
23302326
}
2331-
}
2327+
break;
2328+
#else
2329+
dev_info(&pdev->dev, "amdgpu is built without SI support.\n");
2330+
return -ENODEV;
23322331
#endif
2332+
case CHIP_KAVERI:
2333+
case CHIP_BONAIRE:
2334+
case CHIP_HAWAII:
2335+
case CHIP_KABINI:
2336+
case CHIP_MULLINS:
23332337
#ifdef CONFIG_DRM_AMDGPU_CIK
2334-
if (!amdgpu_cik_support) {
2335-
switch (flags & AMD_ASIC_MASK) {
2336-
case CHIP_KAVERI:
2337-
case CHIP_BONAIRE:
2338-
case CHIP_HAWAII:
2339-
case CHIP_KABINI:
2340-
case CHIP_MULLINS:
2338+
if (!amdgpu_cik_support) {
23412339
dev_info(&pdev->dev,
23422340
"CIK support provided by radeon.\n");
23432341
dev_info(&pdev->dev,
23442342
"Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n"
23452343
);
23462344
return -ENODEV;
23472345
}
2348-
}
2346+
break;
2347+
#else
2348+
dev_info(&pdev->dev, "amdgpu is built without CIK support.\n");
2349+
return -ENODEV;
23492350
#endif
2351+
default:
2352+
break;
2353+
}
23502354

23512355
adev = devm_drm_dev_alloc(&pdev->dev, &amdgpu_kms_driver, typeof(*adev), ddev);
23522356
if (IS_ERR(adev))

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,7 @@ const char *ras_block_string[] = {
7777
"jpeg",
7878
"ih",
7979
"mpio",
80+
"mmsch",
8081
};
8182

8283
const char *ras_mca_block_string[] = {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -98,6 +98,7 @@ enum amdgpu_ras_block {
9898
AMDGPU_RAS_BLOCK__JPEG,
9999
AMDGPU_RAS_BLOCK__IH,
100100
AMDGPU_RAS_BLOCK__MPIO,
101+
AMDGPU_RAS_BLOCK__MMSCH,
101102

102103
AMDGPU_RAS_BLOCK__LAST,
103104
AMDGPU_RAS_BLOCK__ANY = -1
@@ -795,6 +796,12 @@ amdgpu_ras_block_to_ta(enum amdgpu_ras_block block) {
795796
return TA_RAS_BLOCK__VCN;
796797
case AMDGPU_RAS_BLOCK__JPEG:
797798
return TA_RAS_BLOCK__JPEG;
799+
case AMDGPU_RAS_BLOCK__IH:
800+
return TA_RAS_BLOCK__IH;
801+
case AMDGPU_RAS_BLOCK__MPIO:
802+
return TA_RAS_BLOCK__MPIO;
803+
case AMDGPU_RAS_BLOCK__MMSCH:
804+
return TA_RAS_BLOCK__MMSCH;
798805
default:
799806
WARN_ONCE(1, "RAS ERROR: unexpected block id %d\n", block);
800807
return TA_RAS_BLOCK__UMC;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

Lines changed: 8 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -608,59 +608,17 @@ static ssize_t amdgpu_debugfs_mqd_read(struct file *f, char __user *buf,
608608
size_t size, loff_t *pos)
609609
{
610610
struct amdgpu_ring *ring = file_inode(f)->i_private;
611-
volatile u32 *mqd;
612-
u32 *kbuf;
613-
int r, i;
614-
uint32_t value, result;
611+
ssize_t bytes = min_t(ssize_t, ring->mqd_size - *pos, size);
612+
void *from = ((u8 *)ring->mqd_ptr) + *pos;
615613

616-
if (*pos & 3 || size & 3)
617-
return -EINVAL;
618-
619-
kbuf = kmalloc(ring->mqd_size, GFP_KERNEL);
620-
if (!kbuf)
621-
return -ENOMEM;
622-
623-
r = amdgpu_bo_reserve(ring->mqd_obj, false);
624-
if (unlikely(r != 0))
625-
goto err_free;
626-
627-
r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&mqd);
628-
if (r)
629-
goto err_unreserve;
630-
631-
/*
632-
* Copy to local buffer to avoid put_user(), which might fault
633-
* and acquire mmap_sem, under reservation_ww_class_mutex.
634-
*/
635-
for (i = 0; i < ring->mqd_size/sizeof(u32); i++)
636-
kbuf[i] = mqd[i];
614+
if (*pos > ring->mqd_size)
615+
return 0;
637616

638-
amdgpu_bo_kunmap(ring->mqd_obj);
639-
amdgpu_bo_unreserve(ring->mqd_obj);
617+
if (copy_to_user(buf, from, bytes))
618+
return -EFAULT;
640619

641-
result = 0;
642-
while (size) {
643-
if (*pos >= ring->mqd_size)
644-
break;
645-
646-
value = kbuf[*pos/4];
647-
r = put_user(value, (uint32_t *)buf);
648-
if (r)
649-
goto err_free;
650-
buf += 4;
651-
result += 4;
652-
size -= 4;
653-
*pos += 4;
654-
}
655-
656-
kfree(kbuf);
657-
return result;
658-
659-
err_unreserve:
660-
amdgpu_bo_unreserve(ring->mqd_obj);
661-
err_free:
662-
kfree(kbuf);
663-
return r;
620+
*pos += bytes;
621+
return bytes;
664622
}
665623

666624
static const struct file_operations amdgpu_debugfs_mqd_fops = {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1172,7 +1172,7 @@ static int xgmi_v6_4_0_aca_bank_parser(struct aca_handle *handle, struct aca_ban
11721172
break;
11731173
case ACA_SMU_TYPE_CE:
11741174
count = ext_error_code == 6 ? count : 0ULL;
1175-
bank->aca_err_type = ACA_BANK_ERR_CE_DE_DECODE(bank);
1175+
bank->aca_err_type = ACA_ERROR_TYPE_CE;
11761176
ret = aca_error_cache_log_bank_error(handle, &info, bank->aca_err_type, count);
11771177
break;
11781178
default:

‎drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -473,7 +473,8 @@ static int aqua_vanjaram_get_xcp_res_info(struct amdgpu_xcp_mgr *xcp_mgr,
473473
break;
474474
case AMDGPU_DPX_PARTITION_MODE:
475475
num_xcp = 2;
476-
nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE);
476+
nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |
477+
BIT(AMDGPU_NPS2_PARTITION_MODE);
477478
break;
478479
case AMDGPU_TPX_PARTITION_MODE:
479480
num_xcp = 3;

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