Skip to content

Commit 734ae15

Browse files
JakubVanekgregkh
authored andcommitted
Revert "usb: dwc3: core: Enable AutoRetry feature in the controller"
This reverts commit b138e23. AutoRetry has been found to sometimes cause controller freezes when communicating with buggy USB devices. This controller feature allows the controller in host mode to send non-terminating/burst retry ACKs instead of terminating retry ACKs to devices when a transaction error (CRC error or overflow) occurs. Unfortunately, if the USB device continues to respond with a CRC error, the controller will not complete endpoint-related commands while it keeps trying to auto-retry. [3] The xHCI driver will notice this once it tries to abort the transfer using a Stop Endpoint command and does not receive a completion in time. [1] This situation is reported to dmesg: [sda] tag#29 uas_eh_abort_handler 0 uas-tag 1 inflight: CMD IN [sda] tag#29 CDB: opcode=0x28 28 00 00 69 42 80 00 00 48 00 xhci-hcd: xHCI host not responding to stop endpoint command xhci-hcd: xHCI host controller not responding, assume dead xhci-hcd: HC died; cleaning up Some users observed this problem on an Odroid HC2 with the JMS578 USB3-to-SATA bridge. The issue can be triggered by starting a read-heavy workload on an attached SSD. After a while, the host controller would die and the SSD would disappear from the system. [1] Further analysis by Synopsys determined that controller revisions other than the one in Odroid HC2 are also affected by this. The recommended solution was to disable AutoRetry altogether. This change does not have a noticeable performance impact. [2] Revert the enablement commit. This will keep the AutoRetry bit in the default state configured during SoC design [2]. Fixes: b138e23 ("usb: dwc3: core: Enable AutoRetry feature in the controller") Link: https://lore.kernel.org/r/a21f34c04632d250cd0a78c7c6f4a1c9c7a43142.camel@gmail.com/ [1] Link: https://lore.kernel.org/r/20230711214834.kyr6ulync32d4ktk@synopsys.com/ [2] Link: https://lore.kernel.org/r/20230712225518.2smu7wse6djc7l5o@synopsys.com/ [3] Cc: stable@vger.kernel.org Cc: Mauro Ribeiro <mauro.ribeiro@hardkernel.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Suggested-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: Jakub Vanek <linuxtardis@gmail.com> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/20230714122419.27741-1-linuxtardis@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1 parent 5bef4b3 commit 734ae15

File tree

2 files changed

+0
-19
lines changed

2 files changed

+0
-19
lines changed

drivers/usb/dwc3/core.c

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1209,22 +1209,6 @@ static int dwc3_core_init(struct dwc3 *dwc)
12091209
dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
12101210
}
12111211

1212-
if (dwc->dr_mode == USB_DR_MODE_HOST ||
1213-
dwc->dr_mode == USB_DR_MODE_OTG) {
1214-
reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
1215-
1216-
/*
1217-
* Enable Auto retry Feature to make the controller operating in
1218-
* Host mode on seeing transaction errors(CRC errors or internal
1219-
* overrun scenerios) on IN transfers to reply to the device
1220-
* with a non-terminating retry ACK (i.e, an ACK transcation
1221-
* packet with Retry=1 & Nump != 0)
1222-
*/
1223-
reg |= DWC3_GUCTL_HSTINAUTORETRY;
1224-
1225-
dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
1226-
}
1227-
12281212
/*
12291213
* Must config both number of packets and max burst settings to enable
12301214
* RX and/or TX threshold.

drivers/usb/dwc3/core.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -256,9 +256,6 @@
256256
#define DWC3_GCTL_GBLHIBERNATIONEN BIT(1)
257257
#define DWC3_GCTL_DSBLCLKGTNG BIT(0)
258258

259-
/* Global User Control Register */
260-
#define DWC3_GUCTL_HSTINAUTORETRY BIT(14)
261-
262259
/* Global User Control 1 Register */
263260
#define DWC3_GUCTL1_DEV_DECOUPLE_L1L2_EVT BIT(31)
264261
#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28)

0 commit comments

Comments
 (0)