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drm/msm/adreno: Add adreno family
Sometimes it is useful to know the sub-generation (or "family"). And in any case, this helps us get away from infering the generation from the numerical chip-id. v2: Fix is_a2xx() typo Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/549773/
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‎drivers/gpu/drm/msm/adreno/adreno_device.c

Lines changed: 30 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600);
2323
static const struct adreno_info gpulist[] = {
2424
{
2525
.rev = ADRENO_REV(2, 0, 0, 0),
26+
.family = ADRENO_2XX_GEN1,
2627
.revn = 200,
2728
.fw = {
2829
[ADRENO_FW_PM4] = "yamato_pm4.fw",
@@ -33,6 +34,7 @@ static const struct adreno_info gpulist[] = {
3334
.init = a2xx_gpu_init,
3435
}, { /* a200 on i.mx51 has only 128kib gmem */
3536
.rev = ADRENO_REV(2, 0, 0, 1),
37+
.family = ADRENO_2XX_GEN1,
3638
.revn = 201,
3739
.fw = {
3840
[ADRENO_FW_PM4] = "yamato_pm4.fw",
@@ -43,6 +45,7 @@ static const struct adreno_info gpulist[] = {
4345
.init = a2xx_gpu_init,
4446
}, {
4547
.rev = ADRENO_REV(2, 2, 0, ANY_ID),
48+
.family = ADRENO_2XX_GEN2,
4649
.revn = 220,
4750
.fw = {
4851
[ADRENO_FW_PM4] = "leia_pm4_470.fw",
@@ -53,6 +56,7 @@ static const struct adreno_info gpulist[] = {
5356
.init = a2xx_gpu_init,
5457
}, {
5558
.rev = ADRENO_REV(3, 0, 5, ANY_ID),
59+
.family = ADRENO_3XX,
5660
.revn = 305,
5761
.fw = {
5862
[ADRENO_FW_PM4] = "a300_pm4.fw",
@@ -63,6 +67,7 @@ static const struct adreno_info gpulist[] = {
6367
.init = a3xx_gpu_init,
6468
}, {
6569
.rev = ADRENO_REV(3, 0, 6, 0),
70+
.family = ADRENO_3XX,
6671
.revn = 307, /* because a305c is revn==306 */
6772
.fw = {
6873
[ADRENO_FW_PM4] = "a300_pm4.fw",
@@ -73,6 +78,7 @@ static const struct adreno_info gpulist[] = {
7378
.init = a3xx_gpu_init,
7479
}, {
7580
.rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID),
81+
.family = ADRENO_3XX,
7682
.revn = 320,
7783
.fw = {
7884
[ADRENO_FW_PM4] = "a300_pm4.fw",
@@ -83,6 +89,7 @@ static const struct adreno_info gpulist[] = {
8389
.init = a3xx_gpu_init,
8490
}, {
8591
.rev = ADRENO_REV(3, 3, 0, ANY_ID),
92+
.family = ADRENO_3XX,
8693
.revn = 330,
8794
.fw = {
8895
[ADRENO_FW_PM4] = "a330_pm4.fw",
@@ -93,6 +100,7 @@ static const struct adreno_info gpulist[] = {
93100
.init = a3xx_gpu_init,
94101
}, {
95102
.rev = ADRENO_REV(4, 0, 5, ANY_ID),
103+
.family = ADRENO_4XX,
96104
.revn = 405,
97105
.fw = {
98106
[ADRENO_FW_PM4] = "a420_pm4.fw",
@@ -103,6 +111,7 @@ static const struct adreno_info gpulist[] = {
103111
.init = a4xx_gpu_init,
104112
}, {
105113
.rev = ADRENO_REV(4, 2, 0, ANY_ID),
114+
.family = ADRENO_4XX,
106115
.revn = 420,
107116
.fw = {
108117
[ADRENO_FW_PM4] = "a420_pm4.fw",
@@ -113,6 +122,7 @@ static const struct adreno_info gpulist[] = {
113122
.init = a4xx_gpu_init,
114123
}, {
115124
.rev = ADRENO_REV(4, 3, 0, ANY_ID),
125+
.family = ADRENO_4XX,
116126
.revn = 430,
117127
.fw = {
118128
[ADRENO_FW_PM4] = "a420_pm4.fw",
@@ -123,6 +133,7 @@ static const struct adreno_info gpulist[] = {
123133
.init = a4xx_gpu_init,
124134
}, {
125135
.rev = ADRENO_REV(5, 0, 6, ANY_ID),
136+
.family = ADRENO_5XX,
126137
.revn = 506,
127138
.fw = {
128139
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -140,6 +151,7 @@ static const struct adreno_info gpulist[] = {
140151
.zapfw = "a506_zap.mdt",
141152
}, {
142153
.rev = ADRENO_REV(5, 0, 8, ANY_ID),
154+
.family = ADRENO_5XX,
143155
.revn = 508,
144156
.fw = {
145157
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -156,6 +168,7 @@ static const struct adreno_info gpulist[] = {
156168
.zapfw = "a508_zap.mdt",
157169
}, {
158170
.rev = ADRENO_REV(5, 0, 9, ANY_ID),
171+
.family = ADRENO_5XX,
159172
.revn = 509,
160173
.fw = {
161174
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -173,6 +186,7 @@ static const struct adreno_info gpulist[] = {
173186
.zapfw = "a512_zap.mdt",
174187
}, {
175188
.rev = ADRENO_REV(5, 1, 0, ANY_ID),
189+
.family = ADRENO_5XX,
176190
.revn = 510,
177191
.fw = {
178192
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -187,6 +201,7 @@ static const struct adreno_info gpulist[] = {
187201
.init = a5xx_gpu_init,
188202
}, {
189203
.rev = ADRENO_REV(5, 1, 2, ANY_ID),
204+
.family = ADRENO_5XX,
190205
.revn = 512,
191206
.fw = {
192207
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -203,6 +218,7 @@ static const struct adreno_info gpulist[] = {
203218
.zapfw = "a512_zap.mdt",
204219
}, {
205220
.rev = ADRENO_REV(5, 3, 0, 2),
221+
.family = ADRENO_5XX,
206222
.revn = 530,
207223
.fw = {
208224
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -221,6 +237,7 @@ static const struct adreno_info gpulist[] = {
221237
.zapfw = "a530_zap.mdt",
222238
}, {
223239
.rev = ADRENO_REV(5, 4, 0, ANY_ID),
240+
.family = ADRENO_5XX,
224241
.revn = 540,
225242
.fw = {
226243
[ADRENO_FW_PM4] = "a530_pm4.fw",
@@ -238,6 +255,7 @@ static const struct adreno_info gpulist[] = {
238255
.zapfw = "a540_zap.mdt",
239256
}, {
240257
.rev = ADRENO_REV(6, 1, 0, ANY_ID),
258+
.family = ADRENO_6XX_GEN1,
241259
.revn = 610,
242260
.fw = {
243261
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -263,6 +281,7 @@ static const struct adreno_info gpulist[] = {
263281
),
264282
}, {
265283
.rev = ADRENO_REV(6, 1, 8, ANY_ID),
284+
.family = ADRENO_6XX_GEN1,
266285
.revn = 618,
267286
.fw = {
268287
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -280,6 +299,7 @@ static const struct adreno_info gpulist[] = {
280299
}, {
281300
.machine = "qcom,sm4350",
282301
.rev = ADRENO_REV(6, 1, 9, ANY_ID),
302+
.family = ADRENO_6XX_GEN1,
283303
.revn = 619,
284304
.fw = {
285305
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -298,6 +318,7 @@ static const struct adreno_info gpulist[] = {
298318
}, {
299319
.machine = "qcom,sm6375",
300320
.rev = ADRENO_REV(6, 1, 9, ANY_ID),
321+
.family = ADRENO_6XX_GEN1,
301322
.revn = 619,
302323
.fw = {
303324
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -315,6 +336,7 @@ static const struct adreno_info gpulist[] = {
315336
),
316337
}, {
317338
.rev = ADRENO_REV(6, 1, 9, ANY_ID),
339+
.family = ADRENO_6XX_GEN1,
318340
.revn = 619,
319341
.fw = {
320342
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -335,6 +357,7 @@ static const struct adreno_info gpulist[] = {
335357
),
336358
}, {
337359
.rev = ADRENO_REV(6, 3, 0, ANY_ID),
360+
.family = ADRENO_6XX_GEN1,
338361
.revn = 630,
339362
.fw = {
340363
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -348,6 +371,7 @@ static const struct adreno_info gpulist[] = {
348371
.hwcg = a630_hwcg,
349372
}, {
350373
.rev = ADRENO_REV(6, 4, 0, ANY_ID),
374+
.family = ADRENO_6XX_GEN2,
351375
.revn = 640,
352376
.fw = {
353377
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -365,6 +389,7 @@ static const struct adreno_info gpulist[] = {
365389
),
366390
}, {
367391
.rev = ADRENO_REV(6, 5, 0, ANY_ID),
392+
.family = ADRENO_6XX_GEN3,
368393
.revn = 650,
369394
.fw = {
370395
[ADRENO_FW_SQE] = "a650_sqe.fw",
@@ -386,6 +411,7 @@ static const struct adreno_info gpulist[] = {
386411
),
387412
}, {
388413
.rev = ADRENO_REV(6, 6, 0, ANY_ID),
414+
.family = ADRENO_6XX_GEN4,
389415
.revn = 660,
390416
.fw = {
391417
[ADRENO_FW_SQE] = "a660_sqe.fw",
@@ -401,6 +427,7 @@ static const struct adreno_info gpulist[] = {
401427
.address_space_size = SZ_16G,
402428
}, {
403429
.rev = ADRENO_REV(6, 3, 5, ANY_ID),
430+
.family = ADRENO_6XX_GEN4,
404431
.fw = {
405432
[ADRENO_FW_SQE] = "a660_sqe.fw",
406433
[ADRENO_FW_GMU] = "a660_gmu.bin",
@@ -419,6 +446,7 @@ static const struct adreno_info gpulist[] = {
419446
),
420447
}, {
421448
.rev = ADRENO_REV(6, 8, 0, ANY_ID),
449+
.family = ADRENO_6XX_GEN2,
422450
.revn = 680,
423451
.fw = {
424452
[ADRENO_FW_SQE] = "a630_sqe.fw",
@@ -432,6 +460,7 @@ static const struct adreno_info gpulist[] = {
432460
.hwcg = a640_hwcg,
433461
}, {
434462
.rev = ADRENO_REV(6, 9, 0, ANY_ID),
463+
.family = ADRENO_6XX_GEN4,
435464
.fw = {
436465
[ADRENO_FW_SQE] = "a660_sqe.fw",
437466
[ADRENO_FW_GMU] = "a690_gmu.bin",
@@ -641,7 +670,7 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
641670
DBG("Found GPU: %u.%u.%u.%u", config.rev.core, config.rev.major,
642671
config.rev.minor, config.rev.patchid);
643672

644-
priv->is_a2xx = config.rev.core == 2;
673+
priv->is_a2xx = info->family < ADRENO_3XX;
645674
priv->has_cached_coherent =
646675
!!(info->quirks & ADRENO_QUIRK_HAS_CACHED_COHERENT);
647676

‎drivers/gpu/drm/msm/adreno/adreno_gpu.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1080,8 +1080,13 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
10801080
u32 speedbin;
10811081
int ret;
10821082

1083+
adreno_gpu->funcs = funcs;
1084+
adreno_gpu->info = adreno_info(config->rev);
1085+
adreno_gpu->rev = *rev;
1086+
10831087
/* Only handle the core clock when GMU is not in use (or is absent). */
1084-
if (adreno_has_gmu_wrapper(adreno_gpu) || config->rev.core < 6) {
1088+
if (adreno_has_gmu_wrapper(adreno_gpu) ||
1089+
adreno_gpu->info->family < ADRENO_6XX_GEN1) {
10851090
/*
10861091
* This can only be done before devm_pm_opp_of_add_table(), or
10871092
* dev_pm_opp_set_config() will WARN_ON()
@@ -1097,10 +1102,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
10971102
devm_pm_opp_set_clkname(dev, "core");
10981103
}
10991104

1100-
adreno_gpu->funcs = funcs;
1101-
adreno_gpu->info = adreno_info(config->rev);
1102-
adreno_gpu->rev = *rev;
1103-
11041105
if (adreno_read_speedbin(dev, &speedbin) || !speedbin)
11051106
speedbin = 0xffff;
11061107
adreno_gpu->speedbin = (uint16_t) (0xffff & speedbin);

‎drivers/gpu/drm/msm/adreno/adreno_gpu.h

Lines changed: 34 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,25 @@ enum {
2929
ADRENO_FW_MAX,
3030
};
3131

32+
/**
33+
* @enum adreno_family: identify generation and possibly sub-generation
34+
*
35+
* In some cases there are distinct sub-generations within a major revision
36+
* so it helps to be able to group the GPU devices by generation and if
37+
* necessary sub-generation.
38+
*/
39+
enum adreno_family {
40+
ADRENO_2XX_GEN1, /* a20x */
41+
ADRENO_2XX_GEN2, /* a22x */
42+
ADRENO_3XX,
43+
ADRENO_4XX,
44+
ADRENO_5XX,
45+
ADRENO_6XX_GEN1, /* a630 family */
46+
ADRENO_6XX_GEN2, /* a640 family */
47+
ADRENO_6XX_GEN3, /* a650 family */
48+
ADRENO_6XX_GEN4, /* a660 family */
49+
};
50+
3251
#define ADRENO_QUIRK_TWO_PASS_USE_WFI BIT(0)
3352
#define ADRENO_QUIRK_FAULT_DETECT_MASK BIT(1)
3453
#define ADRENO_QUIRK_LMLOADKILL_DISABLE BIT(2)
@@ -68,6 +87,7 @@ struct adreno_speedbin {
6887
struct adreno_info {
6988
const char *machine;
7089
struct adreno_rev rev;
90+
enum adreno_family family;
7191
uint32_t revn;
7292
const char *fw[ADRENO_FW_MAX];
7393
uint32_t gmem;
@@ -193,14 +213,14 @@ static inline bool adreno_is_a2xx(const struct adreno_gpu *gpu)
193213
{
194214
if (WARN_ON_ONCE(!gpu->info))
195215
return false;
196-
return (gpu->info->revn < 300);
216+
return gpu->info->family <= ADRENO_2XX_GEN2;
197217
}
198218

199219
static inline bool adreno_is_a20x(const struct adreno_gpu *gpu)
200220
{
201221
if (WARN_ON_ONCE(!gpu->info))
202222
return false;
203-
return (gpu->info->revn < 210);
223+
return gpu->info->family == ADRENO_2XX_GEN1;
204224
}
205225

206226
static inline bool adreno_is_a225(const struct adreno_gpu *gpu)
@@ -344,29 +364,31 @@ static inline int adreno_is_a690(const struct adreno_gpu *gpu)
344364
/* check for a615, a616, a618, a619 or any a630 derivatives */
345365
static inline int adreno_is_a630_family(const struct adreno_gpu *gpu)
346366
{
347-
return adreno_is_revn(gpu, 630) ||
348-
adreno_is_revn(gpu, 615) ||
349-
adreno_is_revn(gpu, 616) ||
350-
adreno_is_revn(gpu, 618) ||
351-
adreno_is_revn(gpu, 619);
367+
if (WARN_ON_ONCE(!gpu->info))
368+
return false;
369+
return gpu->info->family == ADRENO_6XX_GEN1;
352370
}
353371

354372
static inline int adreno_is_a660_family(const struct adreno_gpu *gpu)
355373
{
356-
return adreno_is_a660(gpu) || adreno_is_a690(gpu) || adreno_is_7c3(gpu);
374+
if (WARN_ON_ONCE(!gpu->info))
375+
return false;
376+
return gpu->info->family == ADRENO_6XX_GEN4;
357377
}
358378

359379
/* check for a650, a660, or any derivatives */
360380
static inline int adreno_is_a650_family(const struct adreno_gpu *gpu)
361381
{
362-
return adreno_is_revn(gpu, 650) ||
363-
adreno_is_revn(gpu, 620) ||
364-
adreno_is_a660_family(gpu);
382+
if (WARN_ON_ONCE(!gpu->info))
383+
return false;
384+
return gpu->info->family >= ADRENO_6XX_GEN3;
365385
}
366386

367387
static inline int adreno_is_a640_family(const struct adreno_gpu *gpu)
368388
{
369-
return adreno_is_a640(gpu) || adreno_is_a680(gpu);
389+
if (WARN_ON_ONCE(!gpu->info))
390+
return false;
391+
return gpu->info->family == ADRENO_6XX_GEN2;
370392
}
371393

372394
u64 adreno_private_address_space_size(struct msm_gpu *gpu);

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