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Merge tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "New support: - Loongson LS2X APB DMA controller - sf-pdma: mpfs-pdma support - Qualcomm X1E80100 GPI dma controller support Updates: - Xilinx XDMA updates to support interleaved DMA transfers - TI PSIL threads for AM62P and J722S and cfg register regions description - axi-dmac Improving the cyclic DMA transfers - Tegra Support dma-channel-mask property - Remaining platform remove callback returning void conversions Driver fixes for: - Xilinx xdma driver operator precedence and initialization fix - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers - format-overflow warning fix for rz-dmac, sh usb dmac drivers - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma drivers" * tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits) dmaengine: dw-edma: increase size of 'name' in debugfs code dmaengine: fsl-qdma: increase size of 'irq_name' dmaengine: shdma: increase size of 'dev_id' dmaengine: xilinx: xdma: Fix kernel-doc warnings dmaengine: usb-dmac: Avoid format-overflow warning dmaengine: sh: rz-dmac: Avoid format-overflow warning dmaengine: imx-sdma: fix Excess kernel-doc warnings dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr() dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma() dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma dmaengine: xilinx: xdma: Workaround truncation compilation error dmaengine: pl330: issue_pending waits until WFP state dmaengine: xilinx: xdma: Implement interleaved DMA transfers dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers dmaengine: xilinx: xdma: Add transfer error reporting dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr() dmaengine: xilinx: xdma: Rework xdma_terminate_all() dmaengine: xilinx: xdma: Ease dma_pool alignment requirements dmaengine: xilinx: xdma: Add necessary macro definitions dmaengine: xilinx: xdma: Get rid of unused code ...
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‎Documentation/devicetree/bindings/dma/dma-controller.yaml

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additionalProperties: true
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examples:
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- |
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dma: dma-controller@48000000 {
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compatible = "ti,omap-sdma";
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reg = <0x48000000 0x1000>;
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interrupts = <0 12 0x4>,
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<0 13 0x4>,
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<0 14 0x4>,
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<0 15 0x4>;
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#dma-cells = <1>;
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dma-channels = <32>;
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dma-requests = <127>;
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dma-channel-mask = <0xfffe>;
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};
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...

‎Documentation/devicetree/bindings/dma/dma-router.yaml

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additionalProperties: true
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examples:
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- |
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sdma_xbar: dma-router@4a002b78 {
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compatible = "ti,dra7-dma-crossbar";
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reg = <0x4a002b78 0xfc>;
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#dma-cells = <1>;
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dma-requests = <205>;
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ti,dma-safe-map = <0>;
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dma-masters = <&sdma>;
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};
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‎Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/loongson,ls2x-apbdma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Loongson LS2X APB DMA controller
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description:
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The Loongson LS2X APB DMA controller is used for transferring data
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between system memory and the peripherals on the APB bus.
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maintainers:
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- Binbin Zhou <zhoubinbin@loongson.cn>
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allOf:
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- $ref: dma-controller.yaml#
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properties:
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compatible:
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oneOf:
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- const: loongson,ls2k1000-apbdma
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- items:
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- const: loongson,ls2k0500-apbdma
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- const: loongson,ls2k1000-apbdma
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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'#dma-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- '#dma-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/loongson,ls2k-clk.h>
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dma-controller@1fe00c00 {
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compatible = "loongson,ls2k1000-apbdma";
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reg = <0x1fe00c00 0x8>;
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interrupt-parent = <&liointc1>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk LOONGSON2_APB_CLK>;
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#dma-cells = <1>;
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};
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...

‎Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml

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ADMA_CHn_CTRL register.
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const: 1
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dma-channel-mask:
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maxItems: 1
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required:
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- compatible
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- reg

‎Documentation/devicetree/bindings/dma/qcom,gpi.yaml

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- qcom,sm8350-gpi-dma
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- qcom,sm8450-gpi-dma
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- qcom,sm8550-gpi-dma
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- qcom,sm8650-gpi-dma
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- qcom,x1e80100-gpi-dma
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- const: qcom,sm6350-gpi-dma
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- items:
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- enum:

‎Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

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compatible:
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items:
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- enum:
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- renesas,r9a07g043-dmac # RZ/G2UL
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- renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
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- renesas,r9a07g044-dmac # RZ/G2{L,LC}
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- renesas,r9a07g054-dmac # RZ/V2L
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- const: renesas,rz-dmac

‎Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml

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compatible:
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items:
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- enum:
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- microchip,mpfs-pdma
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- sifive,fu540-c000-pdma
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- const: sifive,pdma0
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description:

‎Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml

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reg:
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minItems: 3
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maxItems: 5
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maxItems: 9
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reg-names:
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minItems: 3
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maxItems: 5
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maxItems: 9
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"#dma-cells":
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const: 3
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ti,sci-rm-range-tchan: false
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reg:
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maxItems: 3
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items:
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- description: BCDMA Control /Status Registers region
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- description: RX Channel Realtime Registers region
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- description: Ring Realtime Registers region
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reg-names:
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items:
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properties:
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reg:
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minItems: 5
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items:
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- description: BCDMA Control /Status Registers region
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- description: Block Copy Channel Realtime Registers region
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- description: RX Channel Realtime Registers region
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- description: TX Channel Realtime Registers region
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- description: Ring Realtime Registers region
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- description: Ring Configuration Registers region
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- description: TX Channel Configuration Registers region
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- description: RX Channel Configuration Registers region
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- description: Block Copy Channel Configuration Registers region
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reg-names:
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minItems: 5
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items:
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- const: gcfg
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- const: bchanrt
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- const: rchanrt
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- const: tchanrt
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- const: ringrt
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- const: ring
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- const: tchan
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- const: rchan
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- const: bchan
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required:
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- ti,sci-rm-range-bchan
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ti,sci-rm-range-bchan: false
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reg:
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maxItems: 4
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items:
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- description: BCDMA Control /Status Registers region
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- description: RX Channel Realtime Registers region
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- description: TX Channel Realtime Registers region
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- description: Ring Realtime Registers region
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reg-names:
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<0x0 0x4c000000 0x0 0x20000>,
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<0x0 0x4a820000 0x0 0x20000>,
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<0x0 0x4aa40000 0x0 0x20000>,
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<0x0 0x4bc00000 0x0 0x100000>;
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reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
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<0x0 0x4bc00000 0x0 0x100000>,
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<0x0 0x48600000 0x0 0x8000>,
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<0x0 0x484a4000 0x0 0x2000>,
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<0x0 0x484c2000 0x0 0x2000>,
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<0x0 0x48420000 0x0 0x2000>;
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reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
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"ring", "tchan", "rchan", "bchan";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <3>;
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‎Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml

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The second cell is the ASEL value for the channel
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reg:
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maxItems: 4
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minItems: 4
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items:
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- description: Packet DMA Control /Status Registers region
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- description: RX Channel Realtime Registers region
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- description: TX Channel Realtime Registers region
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- description: Ring Realtime Registers region
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- description: Ring Configuration Registers region
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- description: TX Configuration Registers region
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- description: RX Configuration Registers region
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- description: RX Flow Configuration Registers region
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reg-names:
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minItems: 4
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items:
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- const: gcfg
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- const: rchanrt
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- const: tchanrt
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- const: ringrt
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- const: ring
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- const: tchan
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- const: rchan
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- const: rflow
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msi-parent: true
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reg = <0x0 0x485c0000 0x0 0x100>,
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<0x0 0x4a800000 0x0 0x20000>,
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<0x0 0x4aa00000 0x0 0x40000>,
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<0x0 0x4b800000 0x0 0x400000>;
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reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
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<0x0 0x4b800000 0x0 0x400000>,
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<0x0 0x485e0000 0x0 0x20000>,
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<0x0 0x484a0000 0x0 0x4000>,
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<0x0 0x484c0000 0x0 0x2000>,
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<0x0 0x48430000 0x0 0x4000>;
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reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
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"ring", "tchan", "rchan", "rflow";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <2>;
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‎Documentation/devicetree/bindings/dma/ti/k3-udma.yaml

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- ti,j721e-navss-mcu-udmap
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reg:
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maxItems: 3
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minItems: 3
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items:
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- description: UDMA-P Control /Status Registers region
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- description: RX Channel Realtime Registers region
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- description: TX Channel Realtime Registers region
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- description: TX Configuration Registers region
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- description: RX Configuration Registers region
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- description: RX Flow Configuration Registers region
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reg-names:
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minItems: 3
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items:
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- const: gcfg
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- const: rchanrt
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- const: tchanrt
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- const: tchan
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- const: rchan
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- const: rflow
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msi-parent: true
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compatible = "ti,am654-navss-main-udmap";
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reg = <0x0 0x31150000 0x0 0x100>,
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<0x0 0x34000000 0x0 0x100000>,
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<0x0 0x35000000 0x0 0x100000>;
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reg-names = "gcfg", "rchanrt", "tchanrt";
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<0x0 0x35000000 0x0 0x100000>,
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<0x0 0x30b00000 0x0 0x20000>,
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<0x0 0x30c00000 0x0 0x8000>,
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<0x0 0x30d00000 0x0 0x4000>;
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reg-names = "gcfg", "rchanrt", "tchanrt", "tchan", "rchan", "rflow";
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#dma-cells = <1>;
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ti,ringacc = <&ringacc>;

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