Skip to content

Commit 63f7c84

Browse files
konradybciokrzk
konradybcio
authored and
krzk
committed
pinctrl: qcom: Introduce SM6115 LPI pinctrl driver
Add support for the pin controller block on SM6115's Low Power Island. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230722-topic-6115_lpasstlmm-v2-2-d4883831a858@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
1 parent ba93d88 commit 63f7c84

File tree

3 files changed

+185
-0
lines changed

3 files changed

+185
-0
lines changed

‎drivers/pinctrl/qcom/Kconfig

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,15 @@ config PINCTRL_SC7280_LPASS_LPI
6868
Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
6969
(Low Power Island) found on the Qualcomm Technologies Inc SC7280 platform.
7070

71+
config PINCTRL_SM6115_LPASS_LPI
72+
tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
73+
depends on ARM64 || COMPILE_TEST
74+
depends on PINCTRL_LPASS_LPI
75+
help
76+
This is the pinctrl, pinmux, pinconf and gpiolib driver for the
77+
Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
78+
(Low Power Island) found on the Qualcomm Technologies Inc SM6115 platform.
79+
7180
config PINCTRL_SM8250_LPASS_LPI
7281
tristate "Qualcomm Technologies Inc SM8250 LPASS LPI pin controller driver"
7382
depends on ARM64 || COMPILE_TEST

‎drivers/pinctrl/qcom/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ obj-$(CONFIG_PINCTRL_SDX55) += pinctrl-sdx55.o
4444
obj-$(CONFIG_PINCTRL_SDX65) += pinctrl-sdx65.o
4545
obj-$(CONFIG_PINCTRL_SDX75) += pinctrl-sdx75.o
4646
obj-$(CONFIG_PINCTRL_SM6115) += pinctrl-sm6115.o
47+
obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
4748
obj-$(CONFIG_PINCTRL_SM6125) += pinctrl-sm6125.o
4849
obj-$(CONFIG_PINCTRL_SM6350) += pinctrl-sm6350.o
4950
obj-$(CONFIG_PINCTRL_SM6375) += pinctrl-sm6375.o

‎drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c

Lines changed: 175 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,175 @@
1+
// SPDX-License-Identifier: GPL-2.0-only
2+
/*
3+
* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
4+
* Copyright (c) 2020, 2023 Linaro Ltd.
5+
*/
6+
7+
#include <linux/gpio/driver.h>
8+
#include <linux/module.h>
9+
#include <linux/platform_device.h>
10+
11+
#include "pinctrl-lpass-lpi.h"
12+
13+
enum lpass_lpi_functions {
14+
LPI_MUX_dmic01_clk,
15+
LPI_MUX_dmic01_data,
16+
LPI_MUX_dmic23_clk,
17+
LPI_MUX_dmic23_data,
18+
LPI_MUX_i2s1_clk,
19+
LPI_MUX_i2s1_data,
20+
LPI_MUX_i2s1_ws,
21+
LPI_MUX_i2s2_clk,
22+
LPI_MUX_i2s2_data,
23+
LPI_MUX_i2s2_ws,
24+
LPI_MUX_i2s3_clk,
25+
LPI_MUX_i2s3_data,
26+
LPI_MUX_i2s3_ws,
27+
LPI_MUX_qua_mi2s_data,
28+
LPI_MUX_qua_mi2s_sclk,
29+
LPI_MUX_qua_mi2s_ws,
30+
LPI_MUX_swr_rx_clk,
31+
LPI_MUX_swr_rx_data,
32+
LPI_MUX_swr_tx_clk,
33+
LPI_MUX_swr_tx_data,
34+
LPI_MUX_wsa_mclk,
35+
LPI_MUX_gpio,
36+
LPI_MUX__,
37+
};
38+
39+
static int gpio0_pins[] = { 0 };
40+
static int gpio1_pins[] = { 1 };
41+
static int gpio2_pins[] = { 2 };
42+
static int gpio3_pins[] = { 3 };
43+
static int gpio4_pins[] = { 4 };
44+
static int gpio5_pins[] = { 5 };
45+
static int gpio6_pins[] = { 6 };
46+
static int gpio7_pins[] = { 7 };
47+
static int gpio8_pins[] = { 8 };
48+
static int gpio9_pins[] = { 9 };
49+
static int gpio10_pins[] = { 10 };
50+
static int gpio11_pins[] = { 11 };
51+
static int gpio12_pins[] = { 12 };
52+
static int gpio13_pins[] = { 13 };
53+
static int gpio14_pins[] = { 14 };
54+
static int gpio15_pins[] = { 15 };
55+
static int gpio16_pins[] = { 16 };
56+
static int gpio17_pins[] = { 17 };
57+
static int gpio18_pins[] = { 18 };
58+
59+
static const struct pinctrl_pin_desc sm6115_lpi_pins[] = {
60+
PINCTRL_PIN(0, "gpio0"),
61+
PINCTRL_PIN(1, "gpio1"),
62+
PINCTRL_PIN(2, "gpio2"),
63+
PINCTRL_PIN(3, "gpio3"),
64+
PINCTRL_PIN(4, "gpio4"),
65+
PINCTRL_PIN(5, "gpio5"),
66+
PINCTRL_PIN(6, "gpio6"),
67+
PINCTRL_PIN(7, "gpio7"),
68+
PINCTRL_PIN(8, "gpio8"),
69+
PINCTRL_PIN(9, "gpio9"),
70+
PINCTRL_PIN(10, "gpio10"),
71+
PINCTRL_PIN(11, "gpio11"),
72+
PINCTRL_PIN(12, "gpio12"),
73+
PINCTRL_PIN(13, "gpio13"),
74+
PINCTRL_PIN(14, "gpio14"),
75+
PINCTRL_PIN(15, "gpio15"),
76+
PINCTRL_PIN(16, "gpio16"),
77+
PINCTRL_PIN(17, "gpio17"),
78+
PINCTRL_PIN(18, "gpio18"),
79+
};
80+
81+
static const char * const dmic01_clk_groups[] = { "gpio6" };
82+
static const char * const dmic01_data_groups[] = { "gpio7" };
83+
static const char * const dmic23_clk_groups[] = { "gpio8" };
84+
static const char * const dmic23_data_groups[] = { "gpio9" };
85+
static const char * const i2s1_clk_groups[] = { "gpio6" };
86+
static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
87+
static const char * const i2s1_ws_groups[] = { "gpio7" };
88+
static const char * const i2s2_clk_groups[] = { "gpio10" };
89+
static const char * const i2s2_data_groups[] = { "gpio12", "gpio13" };
90+
static const char * const i2s2_ws_groups[] = { "gpio11" };
91+
static const char * const i2s3_clk_groups[] = { "gpio14" };
92+
static const char * const i2s3_data_groups[] = { "gpio16", "gpio17" };
93+
static const char * const i2s3_ws_groups[] = { "gpio15" };
94+
static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4", "gpio5" };
95+
static const char * const qua_mi2s_sclk_groups[] = { "gpio0" };
96+
static const char * const qua_mi2s_ws_groups[] = { "gpio1" };
97+
static const char * const swr_rx_clk_groups[] = { "gpio3" };
98+
static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" };
99+
static const char * const swr_tx_clk_groups[] = { "gpio0" };
100+
static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2" };
101+
static const char * const wsa_mclk_groups[] = { "gpio18" };
102+
103+
static const struct lpi_pingroup sm6115_groups[] = {
104+
LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _),
105+
LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _),
106+
LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _),
107+
LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _),
108+
LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _),
109+
LPI_PINGROUP(5, 12, swr_rx_data, _, qua_mi2s_data, _),
110+
LPI_PINGROUP(6, LPI_NO_SLEW, dmic01_clk, i2s1_clk, _, _),
111+
LPI_PINGROUP(7, LPI_NO_SLEW, dmic01_data, i2s1_ws, _, _),
112+
LPI_PINGROUP(8, LPI_NO_SLEW, dmic23_clk, i2s1_data, _, _),
113+
LPI_PINGROUP(9, LPI_NO_SLEW, dmic23_data, i2s1_data, _, _),
114+
LPI_PINGROUP(10, LPI_NO_SLEW, i2s2_clk, _, _, _),
115+
LPI_PINGROUP(11, LPI_NO_SLEW, i2s2_ws, _, _, _),
116+
LPI_PINGROUP(12, LPI_NO_SLEW, _, i2s2_data, _, _),
117+
LPI_PINGROUP(13, LPI_NO_SLEW, _, i2s2_data, _, _),
118+
LPI_PINGROUP(14, LPI_NO_SLEW, i2s3_clk, _, _, _),
119+
LPI_PINGROUP(15, LPI_NO_SLEW, i2s3_ws, _, _, _),
120+
LPI_PINGROUP(16, LPI_NO_SLEW, i2s3_data, _, _, _),
121+
LPI_PINGROUP(17, LPI_NO_SLEW, i2s3_data, _, _, _),
122+
LPI_PINGROUP(18, 14, wsa_mclk, _, _, _),
123+
};
124+
125+
static const struct lpi_function sm6115_functions[] = {
126+
LPI_FUNCTION(dmic01_clk),
127+
LPI_FUNCTION(dmic01_data),
128+
LPI_FUNCTION(dmic23_clk),
129+
LPI_FUNCTION(dmic23_data),
130+
LPI_FUNCTION(i2s1_clk),
131+
LPI_FUNCTION(i2s1_data),
132+
LPI_FUNCTION(i2s1_ws),
133+
LPI_FUNCTION(i2s2_clk),
134+
LPI_FUNCTION(i2s2_data),
135+
LPI_FUNCTION(i2s2_ws),
136+
LPI_FUNCTION(i2s3_clk),
137+
LPI_FUNCTION(i2s3_data),
138+
LPI_FUNCTION(i2s3_ws),
139+
LPI_FUNCTION(qua_mi2s_data),
140+
LPI_FUNCTION(qua_mi2s_sclk),
141+
LPI_FUNCTION(qua_mi2s_ws),
142+
LPI_FUNCTION(swr_rx_clk),
143+
LPI_FUNCTION(swr_rx_data),
144+
LPI_FUNCTION(swr_tx_clk),
145+
LPI_FUNCTION(swr_tx_data),
146+
LPI_FUNCTION(wsa_mclk),
147+
};
148+
149+
static const struct lpi_pinctrl_variant_data sm6115_lpi_data = {
150+
.pins = sm6115_lpi_pins,
151+
.npins = ARRAY_SIZE(sm6115_lpi_pins),
152+
.groups = sm6115_groups,
153+
.ngroups = ARRAY_SIZE(sm6115_groups),
154+
.functions = sm6115_functions,
155+
.nfunctions = ARRAY_SIZE(sm6115_functions),
156+
};
157+
158+
static const struct of_device_id lpi_pinctrl_of_match[] = {
159+
{ .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data },
160+
{ }
161+
};
162+
MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match);
163+
164+
static struct platform_driver lpi_pinctrl_driver = {
165+
.driver = {
166+
.name = "qcom-sm6115-lpass-lpi-pinctrl",
167+
.of_match_table = lpi_pinctrl_of_match,
168+
},
169+
.probe = lpi_pinctrl_probe,
170+
.remove = lpi_pinctrl_remove,
171+
};
172+
173+
module_platform_driver(lpi_pinctrl_driver);
174+
MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver");
175+
MODULE_LICENSE("GPL");

0 commit comments

Comments
 (0)