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drm/amdkfd: disable IOMMUv2 support for KV/CZ
Use the dGPU path instead. There were a lot of platform issues with IOMMU in general on these chips due to windows not enabling IOMMU at the time. The dGPU path has been used for a long time with newer APUs and works fine. This also paves the way to simplify the driver significantly. v2: use the dGPU queue manager functions Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Tested-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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-13
lines changed

2 files changed

+1
-13
lines changed

drivers/gpu/drm/amd/amdkfd/kfd_device.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -233,10 +233,6 @@ static void kfd_device_info_init(struct kfd_dev *kfd,
233233
asic_type != CHIP_TONGA)
234234
kfd->device_info.supports_cwsr = true;
235235

236-
if (asic_type == CHIP_KAVERI ||
237-
asic_type == CHIP_CARRIZO)
238-
kfd->device_info.needs_iommu_device = true;
239-
240236
if (asic_type != CHIP_HAWAII && !vf)
241237
kfd->device_info.needs_pci_atomics = true;
242238
}
@@ -249,7 +245,6 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
249245
uint32_t gfx_target_version = 0;
250246

251247
switch (adev->asic_type) {
252-
#ifdef KFD_SUPPORT_IOMMU_V2
253248
#ifdef CONFIG_DRM_AMDGPU_CIK
254249
case CHIP_KAVERI:
255250
gfx_target_version = 70000;
@@ -262,7 +257,6 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
262257
if (!vf)
263258
f2g = &gfx_v8_kfd2kgd;
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break;
265-
#endif
266260
#ifdef CONFIG_DRM_AMDGPU_CIK
267261
case CHIP_HAWAII:
268262
gfx_target_version = 70001;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2538,18 +2538,12 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_node *dev)
25382538
}
25392539

25402540
switch (dev->adev->asic_type) {
2541-
case CHIP_CARRIZO:
2542-
device_queue_manager_init_vi(&dqm->asic_ops);
2543-
break;
2544-
25452541
case CHIP_KAVERI:
2546-
device_queue_manager_init_cik(&dqm->asic_ops);
2547-
break;
2548-
25492542
case CHIP_HAWAII:
25502543
device_queue_manager_init_cik_hawaii(&dqm->asic_ops);
25512544
break;
25522545

2546+
case CHIP_CARRIZO:
25532547
case CHIP_TONGA:
25542548
case CHIP_FIJI:
25552549
case CHIP_POLARIS10:

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