@@ -464,7 +464,7 @@ static int xgene_pcie_select_ib_reg(u8 *ib_reg_mask, u64 size)
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return 1 ;
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}
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- if ((size > SZ_1K ) && (size < SZ_4G ) && !(* ib_reg_mask & (1 << 0 ))) {
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+ if ((size > SZ_1K ) && (size < SZ_1T ) && !(* ib_reg_mask & (1 << 0 ))) {
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* ib_reg_mask |= (1 << 0 );
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return 0 ;
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}
@@ -478,28 +478,27 @@ static int xgene_pcie_select_ib_reg(u8 *ib_reg_mask, u64 size)
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}
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static void xgene_pcie_setup_ib_reg (struct xgene_pcie * port ,
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- struct resource_entry * entry ,
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- u8 * ib_reg_mask )
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+ struct of_pci_range * range , u8 * ib_reg_mask )
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{
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void __iomem * cfg_base = port -> cfg_base ;
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struct device * dev = port -> dev ;
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void __iomem * bar_addr ;
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u32 pim_reg ;
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- u64 cpu_addr = entry -> res -> start ;
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- u64 pci_addr = cpu_addr - entry -> offset ;
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- u64 size = resource_size ( entry -> res ) ;
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+ u64 cpu_addr = range -> cpu_addr ;
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+ u64 pci_addr = range -> pci_addr ;
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+ u64 size = range -> size ;
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u64 mask = ~(size - 1 ) | EN_REG ;
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u32 flags = PCI_BASE_ADDRESS_MEM_TYPE_64 ;
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u32 bar_low ;
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int region ;
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- region = xgene_pcie_select_ib_reg (ib_reg_mask , size );
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+ region = xgene_pcie_select_ib_reg (ib_reg_mask , range -> size );
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if (region < 0 ) {
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dev_warn (dev , "invalid pcie dma-range config\n" );
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return ;
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}
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- if (entry -> res -> flags & IORESOURCE_PREFETCH )
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+ if (range -> flags & IORESOURCE_PREFETCH )
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flags |= PCI_BASE_ADDRESS_MEM_PREFETCH ;
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bar_low = pcie_bar_low_val ((u32 )cpu_addr , flags );
@@ -530,13 +529,25 @@ static void xgene_pcie_setup_ib_reg(struct xgene_pcie *port,
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static int xgene_pcie_parse_map_dma_ranges (struct xgene_pcie * port )
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{
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- struct pci_host_bridge * bridge = pci_host_bridge_from_priv (port );
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- struct resource_entry * entry ;
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+ struct device_node * np = port -> node ;
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+ struct of_pci_range range ;
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+ struct of_pci_range_parser parser ;
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+ struct device * dev = port -> dev ;
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u8 ib_reg_mask = 0 ;
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- resource_list_for_each_entry (entry , & bridge -> dma_ranges )
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- xgene_pcie_setup_ib_reg (port , entry , & ib_reg_mask );
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+ if (of_pci_dma_range_parser_init (& parser , np )) {
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+ dev_err (dev , "missing dma-ranges property\n" );
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+ return - EINVAL ;
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+ }
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+
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+ /* Get the dma-ranges from DT */
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+ for_each_of_pci_range (& parser , & range ) {
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+ u64 end = range .cpu_addr + range .size - 1 ;
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+ dev_dbg (dev , "0x%08x 0x%016llx..0x%016llx -> 0x%016llx\n" ,
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+ range .flags , range .cpu_addr , end , range .pci_addr );
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+ xgene_pcie_setup_ib_reg (port , & range , & ib_reg_mask );
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+ }
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return 0 ;
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}
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